This commit is contained in:
MITSUNARI Shigeo 2024-11-11 16:03:36 +09:00
parent df98982836
commit 2d6794ca7b
7 changed files with 8 additions and 6 deletions

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@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 3.5)
project(xbyak LANGUAGES CXX VERSION 7.21)
project(xbyak LANGUAGES CXX VERSION 7.22)
file(GLOB headers xbyak/*.h)

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@ -1,5 +1,6 @@
# History
* 2024/Nov/11 ver 7.22 add Reg::cvt{128,256,512}(). tested by xed 2024.11.04
* 2024/Oct/31 ver 7.21 Enhance XMM register validation in SSE instructions
* 2024/Oct/17 ver 7.20.1 Updated to comply with AVX10.2 specification rev 2.0
* 2024/Oct/15 ver 7.20 Fixed the specification of setDefaultEncoding, setDefaultEncodingAVX10.

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@ -5,7 +5,7 @@
project(
'xbyak',
'cpp',
version: '7.21',
version: '7.22',
license: 'BSD-3-Clause',
default_options: 'b_ndebug=if-release'
)

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@ -1,5 +1,5 @@
# Xbyak 7.21 [![Badge Build]][Build Status]
# Xbyak 7.22 [![Badge Build]][Build Status]
*A JIT assembler for x86/x64 architectures supporting advanced instruction sets up to AVX10.2*

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C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 7.21
C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 7.22
-----------------------------------------------------------------------------
◎概要
@ -404,6 +404,7 @@ sample/{echo,hello}.bfは http://www.kmonos.net/alang/etc/brainfuck.php から
-----------------------------------------------------------------------------
◎履歴
2024/11/11 ver 7.22 Reg::cvt{128,256,512}(). xed 2024.11.04でテスト
2024/10/31 ver 7.21 SSE命令のXMMレジスタのチェックを厳密化
2024/10/17 ver 7.20.1 AVX10.2 rev 2.0仕様書の変更に追従
2024/10/15 ver 7.20 setDefaultEncoding/setDefaultEncodingAVX10の仕様確定

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@ -155,7 +155,7 @@ namespace Xbyak {
enum {
DEFAULT_MAX_CODE_SIZE = 4096,
VERSION = 0x7210 /* 0xABCD = A.BC(.D) */
VERSION = 0x7220 /* 0xABCD = A.BC(.D) */
};
#ifndef MIE_INTEGER_TYPE_DEFINED

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@ -1,4 +1,4 @@
const char *getVersionString() const { return "7.21"; }
const char *getVersionString() const { return "7.22"; }
void aadd(const Address& addr, const Reg32e &reg) { opMR(addr, reg, T_0F38, 0x0FC, T_APX); }
void aand(const Address& addr, const Reg32e &reg) { opMR(addr, reg, T_0F38|T_66, 0x0FC, T_APX|T_66); }
void adc(const Operand& op, uint32_t imm) { opOI(op, imm, 0x10, 2); }