mirror of
https://github.com/herumi/xbyak
synced 2024-11-20 16:06:14 -07:00
support AVX
This commit is contained in:
parent
9fa05da02b
commit
3510943e8e
19 changed files with 3354 additions and 6428 deletions
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@ -1,5 +1,5 @@
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Copyright (c) 2007-2010 MITSUNARI Shigeo
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Copyright (c) 2007-2011 MITSUNARI Shigeo
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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572
gen/gen_code.cpp
572
gen/gen_code.cpp
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@ -6,6 +6,35 @@
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using namespace Xbyak;
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enum {
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PP_66 = 1 << 0,
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PP_F3 = 1 << 1,
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PP_F2 = 1 << 2,
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MM_0F = 1 << 5,
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MM_0F38 = 1 << 6,
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MM_0F3A = 1 << 7
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};
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std::string type2String(int type)
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{
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std::string str;
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if (type & MM_0F) {
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str = "MM_0F";
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} else if (type & MM_0F38) {
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str = "MM_0F38";
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} else if (type & MM_0F3A) {
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str = "MM_0F3A";
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}
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if (type & PP_66) {
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str += " | PP_66";
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} else if (type & PP_F3) {
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str += " | PP_F3";
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} else if (type & PP_F2) {
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str += " | PP_F2";
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}
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return str;
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}
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void put()
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{
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const int NO = CodeGenerator::NONE;
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@ -393,7 +422,7 @@ void put()
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const Tbl *p = &tbl[i];
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printf("void cmov%s(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | %d); }\n", p->name, p->ext);
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printf("void j%s(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x%02X, 0x%02X, 0x%02X); }\n", p->name, p->ext | B01110000, p->ext | B10000000, 0x0F);
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printf("void set%s(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | %d); }\n", p->name, p->ext);
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printf("void set%s(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | %d); }\n", p->name, p->ext);
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}
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}
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////////////////////////////////////////////////////////////////
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@ -453,6 +482,7 @@ void put()
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{ "rdmsr", 0x0F, B00110010 },
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{ "rdpmc", 0x0F, B00110011 },
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{ "rdtsc", 0x0F, B00110001 },
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{ "rdtscp", 0x0F, 0x01, 0xF9 },
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{ "wait", B10011011 },
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{ "wbinvd", 0x0F, B00001001 },
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{ "wrmsr", 0x0F, B00110000 },
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@ -461,6 +491,10 @@ void put()
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{ "popf", B10011101 },
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{ "pushf", B10011100 },
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{ "vzeroall", 0xC5, 0xFC, 0x77 },
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{ "vzeroupper", 0xC5, 0xF8, 0x77 },
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{ "xgetbv", 0x0F, 0x01, 0xD0 },
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// FPU
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{ "f2xm1", 0xD9, 0xF0 },
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{ "fabs", 0xD9, 0xE1 },
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@ -575,7 +609,7 @@ void put()
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};
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for (int i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
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printf("void %s(const Operand& op) { opR_ModM(op, 0, 3, %d, 0x%02X); }\n", p->name, p->ext, p->code);
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printf("void %s(const Operand& op) { opR_ModM(op, 0, %d, 0x%02X); }\n", p->name, p->ext, p->code);
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}
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}
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{
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for (int i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
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int preCode = 0x38;
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printf("void %s(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x%02X, 0x66, %d, 0x38); }\n", p->name, p->code, NO);
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printf("void %s(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x%02X, 0x66, NONE, 0x38); }\n", p->name, p->code);
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}
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printf("void palignr(const Mmx& mmx, const Operand& op, int imm) { opMMX(mmx, op, 0x0f, 0x66, static_cast<uint8>(imm), 0x3a); }\n");
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}
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{ 0x41, "phminposuw"},
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// SSE4.2
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{ 0x37, "pcmpgtq" },
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{ 0xde, "aesdec" },
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{ 0xdf, "aesdeclast" },
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{ 0xdc, "aesenc" },
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{ 0xdd, "aesenclast" },
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{ 0xdb, "aesimc" },
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};
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for (int i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
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printf("void %s(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x%02X, 0x66, isXMM_XMMorMEM, %d, 0x38); }\n", p->name, p->code, NO);
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printf("void %s(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x%02X, 0x66, isXMM_XMMorMEM, NONE, 0x38); }\n", p->name, p->code);
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}
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}
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{
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{ 0x61, "pcmpestri" },
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{ 0x62, "pcmpistrm" },
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{ 0x63, "pcmpistri" },
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{ 0x44, "pclmulqdq" },
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{ 0xdf, "aeskeygenassist" },
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};
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for (int i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
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printf("void %s(const Fpu& reg) { opFpu(reg, 0x%02X, 0x%02X); }\n", p->name, p->code1, p->code2);
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}
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}
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// AVX
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{ // pd, ps, sd, ss
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const struct Tbl {
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uint8 code;
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const char *name;
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bool only_pd_ps;
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} tbl[] = {
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{ 0x58, "add", false },
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{ 0x5C, "sub", false },
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{ 0x59, "mul", false },
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{ 0x5E, "div", false },
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{ 0x5F, "max", false },
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{ 0x5D, "min", false },
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{ 0x54, "and", true },
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{ 0x55, "andn", true },
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{ 0x56, "or", true },
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{ 0x57, "xor", true },
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};
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for (int i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
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printf("void v%spd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x%02X, true); }\n", p->name, p->code);
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printf("void v%sps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x%02X, true); }\n", p->name, p->code);
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if (p->only_pd_ps) continue;
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printf("void v%ssd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x%02X, false); }\n", p->name, p->code);
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printf("void v%sss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F3, 0x%02X, false); }\n", p->name, p->code);
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}
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}
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// (x, x, x/m[, imm]) or (y, y, y/m[, imm])
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{
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const struct Tbl {
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uint8 code;
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const char *name;
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int type;
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bool supportYMM;
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int w;
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bool hasIMM;
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bool enableOmit;
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} tbl[] = {
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{ 0x0D, "blendpd", MM_0F3A | PP_66, true, 0, true, true },
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{ 0x0C, "blendps", MM_0F3A | PP_66, true, 0, true, true },
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{ 0x41, "dppd", MM_0F3A | PP_66, false, 0, true, true },
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{ 0x40, "dpps", MM_0F3A | PP_66, true, 0, true, true },
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{ 0x42, "mpsadbw", MM_0F3A | PP_66, false, 0, true, true },
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{ 0x0E, "pblendw", MM_0F3A | PP_66, false, 0, true, true },
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{ 0x0B, "roundsd", MM_0F3A | PP_66, false, 0, true, true },
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{ 0x0A, "roundss", MM_0F3A | PP_66, false, 0, true, true },
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{ 0x44, "pclmulqdq", MM_0F3A | PP_66, false, 0, true, true },
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{ 0x0C, "permilps", MM_0F38 | PP_66, true, 0, false, false },
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{ 0x0D, "permilpd", MM_0F38 | PP_66, true, 0, false, false },
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{ 0xC2, "cmppd", MM_0F | PP_66, true, -1, true, true },
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{ 0xC2, "cmpps", MM_0F, true, -1, true, true },
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{ 0xC2, "cmpsd", MM_0F | PP_F2, false, -1, true, true },
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{ 0xC2, "cmpss", MM_0F | PP_F3, false, -1, true, true },
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{ 0x5A, "cvtsd2ss", MM_0F | PP_F2, false, -1, false, true },
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{ 0x5A, "cvtss2sd", MM_0F | PP_F3, false, -1, false, true },
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{ 0x21, "insertps", MM_0F3A | PP_66, false, 0, true, true },
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{ 0x63, "packsswb", MM_0F | PP_66, false, -1, false, true },
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{ 0x6B, "packssdw", MM_0F | PP_66, false, -1, false, true },
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{ 0x67, "packuswb", MM_0F | PP_66, false, -1, false, true },
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{ 0x2B, "packusdw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xFC, "paddb", MM_0F | PP_66, false, -1, false, true },
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{ 0xFD, "paddw", MM_0F | PP_66, false, -1, false, true },
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{ 0xFE, "paddd", MM_0F | PP_66, false, -1, false, true },
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{ 0xD4, "paddq", MM_0F | PP_66, false, -1, false, true },
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{ 0xEC, "paddsb", MM_0F | PP_66, false, -1, false, true },
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{ 0xED, "paddsw", MM_0F | PP_66, false, -1, false, true },
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{ 0xDC, "paddusb", MM_0F | PP_66, false, -1, false, true },
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{ 0xDD, "paddusw", MM_0F | PP_66, false, -1, false, true },
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{ 0x0F, "palignr", MM_0F3A | PP_66, false, -1, true, true },
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{ 0xDB, "pand", MM_0F | PP_66, false, -1, false, true },
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{ 0xDF, "pandn", MM_0F | PP_66, false, -1, false, true },
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{ 0xE0, "pavgb", MM_0F | PP_66, false, -1, false, true },
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{ 0xE3, "pavgw", MM_0F | PP_66, false, -1, false, true },
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{ 0x74, "pcmpeqb", MM_0F | PP_66, false, -1, false, true },
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{ 0x75, "pcmpeqw", MM_0F | PP_66, false, -1, false, true },
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{ 0x76, "pcmpeqd", MM_0F | PP_66, false, -1, false, true },
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{ 0x29, "pcmpeqq", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x64, "pcmpgtb", MM_0F | PP_66, false, -1, false, true },
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{ 0x65, "pcmpgtw", MM_0F | PP_66, false, -1, false, true },
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{ 0x66, "pcmpgtd", MM_0F | PP_66, false, -1, false, true },
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{ 0x37, "pcmpgtq", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x01, "phaddw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x02, "phaddd", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x03, "phaddsw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x05, "phsubw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x06, "phsubd", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x07, "phsubsw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xF5, "pmaddwd", MM_0F | PP_66, false, -1, false, true },
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{ 0x04, "pmaddubsw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x3C, "pmaxsb", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xEE, "pmaxsw", MM_0F | PP_66, false, -1, false, true },
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{ 0x3D, "pmaxsd", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xDE, "pmaxub", MM_0F | PP_66, false, -1, false, true },
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{ 0x3E, "pmaxuw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x3F, "pmaxud", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x38, "pminsb", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xEA, "pminsw", MM_0F | PP_66, false, -1, false, true },
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{ 0x39, "pminsd", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xDA, "pminub", MM_0F | PP_66, false, -1, false, true },
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{ 0x3A, "pminuw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x3B, "pminud", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xE4, "pmulhuw", MM_0F | PP_66, false, -1, false, true },
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{ 0x0B, "pmulhrsw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xE5, "pmulhw", MM_0F | PP_66, false, -1, false, true },
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{ 0xD5, "pmullw", MM_0F | PP_66, false, -1, false, true },
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{ 0x40, "pmulld", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xF4, "pmuludq", MM_0F | PP_66, false, -1, false, true },
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{ 0x28, "pmuldq", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xEB, "por", MM_0F | PP_66, false, -1, false, true },
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{ 0xF6, "psadbw", MM_0F | PP_66, false, -1, false, true },
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{ 0x00, "pshufb", MM_0F38 | PP_66, false, -1, false, false },
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{ 0x08, "psignb", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x09, "psignw", MM_0F38 | PP_66, false, -1, false, true },
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{ 0x0A, "psignd", MM_0F38 | PP_66, false, -1, false, true },
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{ 0xF1, "psllw", MM_0F | PP_66, false, -1, false, true },
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{ 0xF2, "pslld", MM_0F | PP_66, false, -1, false, true },
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{ 0xF3, "psllq", MM_0F | PP_66, false, -1, false, true },
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{ 0xE1, "psraw", MM_0F | PP_66, false, -1, false, true },
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{ 0xE2, "psrad", MM_0F | PP_66, false, -1, false, true },
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{ 0xD1, "psrlw", MM_0F | PP_66, false, -1, false, true },
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{ 0xD2, "psrld", MM_0F | PP_66, false, -1, false, true },
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{ 0xD3, "psrlq", MM_0F | PP_66, false, -1, false, true },
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{ 0xF8, "psubb", MM_0F | PP_66, false, -1, false, true },
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{ 0xF9, "psubw", MM_0F | PP_66, false, -1, false, true },
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{ 0xFA, "psubd", MM_0F | PP_66, false, -1, false, true },
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{ 0xFB, "psubq", MM_0F | PP_66, false, -1, false, true },
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{ 0xE8, "psubsb", MM_0F | PP_66, false, -1, false, true },
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{ 0xE9, "psubsw", MM_0F | PP_66, false, -1, false, true },
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{ 0xD8, "psubusb", MM_0F | PP_66, false, -1, false, true },
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{ 0xD9, "psubusw", MM_0F | PP_66, false, -1, false, true },
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{ 0x68, "punpckhbw", MM_0F | PP_66, false, -1, false, true },
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{ 0x69, "punpckhwd", MM_0F | PP_66, false, -1, false, true },
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{ 0x6A, "punpckhdq", MM_0F | PP_66, false, -1, false, true },
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{ 0x6D, "punpckhqdq", MM_0F | PP_66, false, -1, false, true },
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{ 0x60, "punpcklbw", MM_0F | PP_66, false, -1, false, true },
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{ 0x61, "punpcklwd", MM_0F | PP_66, false, -1, false, true },
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{ 0x62, "punpckldq", MM_0F | PP_66, false, -1, false, true },
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{ 0x6C, "punpcklqdq", MM_0F | PP_66, false, -1, false, true },
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{ 0xEF, "pxor", MM_0F | PP_66, false, -1, false, true },
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{ 0x53, "rcpss", MM_0F | PP_F3, false, -1, false, true },
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{ 0x52, "rsqrtss", MM_0F | PP_F3, false, -1, false, true },
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{ 0xC6, "shufpd", MM_0F | PP_66, true, -1, true, true },
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{ 0xC6, "shufps", MM_0F, true, -1, true, true },
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{ 0x51, "sqrtsd", MM_0F | PP_F2, false, -1, false, true },
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{ 0x51, "sqrtss", MM_0F | PP_F3, false, -1, false, true },
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{ 0x15, "unpckhpd", MM_0F | PP_66, true, -1, false, true },
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{ 0x15, "unpckhps", MM_0F, true, -1, false, true },
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{ 0x14, "unpcklpd", MM_0F | PP_66, true, -1, false, true },
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{ 0x14, "unpcklps", MM_0F, true, -1, false, true },
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};
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for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
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const Tbl *p = &tbl[i];
|
||||
std::string type = type2String(p->type);
|
||||
printf("void v%s(const Xmm& xm1, const Xmm& xm2, const Operand& op%s) { opAVX_X_X_XM(xm1, xm2, op, %s, 0x%02X, %s, %d)%s; }\n"
|
||||
, p->name, p->hasIMM ? ", uint8 imm" : "", type.c_str(), p->code, p->supportYMM ? "true" : "false", p->w, p->hasIMM ? "; db(imm)" : "");
|
||||
if (!p->enableOmit) continue;
|
||||
printf("void v%s(const Xmm& xmm, const Operand& op%s) { opAVX_X_X_XM(xmm, xmm, op, %s, 0x%02X, %s, %d)%s; }\n"
|
||||
, p->name, p->hasIMM ? ", uint8 imm" : "", type.c_str(), p->code, p->supportYMM ? "true" : "false", p->w, p->hasIMM ? "; db(imm)" : "");
|
||||
}
|
||||
}
|
||||
// (x, x/m[, imm]) or (y, y/m[, imm])
|
||||
{
|
||||
const struct Tbl {
|
||||
uint8 code;
|
||||
const char *name;
|
||||
int type;
|
||||
bool supportYMM;
|
||||
int w;
|
||||
bool hasIMM;
|
||||
} tbl[] = {
|
||||
{ 0xDF, "aeskeygenassist", MM_0F3A | PP_66, false, 0, true },
|
||||
{ 0x09, "roundpd", MM_0F3A | PP_66, true, 0, true },
|
||||
{ 0x08, "roundps", MM_0F3A | PP_66, true, 0, true },
|
||||
{ 0x05, "permilpd", MM_0F3A | PP_66, true, 0, true },
|
||||
{ 0x04, "permilps", MM_0F3A | PP_66, true, 0, true },
|
||||
{ 0x61, "pcmpestri", MM_0F3A | PP_66, false, 0, true },
|
||||
{ 0x60, "pcmpestrm", MM_0F3A | PP_66, false, 0, true },
|
||||
{ 0x63, "pcmpistri", MM_0F3A | PP_66, false, 0, true },
|
||||
{ 0x62, "pcmpistrm", MM_0F3A | PP_66, false, 0, true },
|
||||
{ 0x0E, "testps", MM_0F38 | PP_66, true, 0, false },
|
||||
{ 0x0F, "testpd", MM_0F38 | PP_66, true, 0, false },
|
||||
{ 0x2F, "comisd", MM_0F | PP_66, false, -1, false },
|
||||
{ 0x2F, "comiss", MM_0F, false, -1, false },
|
||||
{ 0x5B, "cvtdq2ps", MM_0F, true, -1, false },
|
||||
{ 0x5B, "cvtps2dq", MM_0F | PP_66, true, -1, false },
|
||||
{ 0x5B, "cvttps2dq", MM_0F | PP_F3, true, -1, false },
|
||||
{ 0x28, "movapd", MM_0F | PP_66, true, -1, false },
|
||||
{ 0x28, "movaps", MM_0F, true, -1, false },
|
||||
{ 0x12, "movddup", MM_0F | PP_F2, true, -1, false },
|
||||
{ 0x6F, "movdqa", MM_0F | PP_66, true, -1, false },
|
||||
{ 0x6F, "movdqu", MM_0F | PP_F3, true, -1, false },
|
||||
{ 0x16, "movshdup", MM_0F | PP_F3, true, -1, false },
|
||||
{ 0x12, "movsldup", MM_0F | PP_F3, true, -1, false },
|
||||
{ 0x10, "movupd", MM_0F | PP_66, true, -1, false },
|
||||
{ 0x10, "movups", MM_0F, true, -1, false },
|
||||
|
||||
{ 0x1C, "pabsb", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x1D, "pabsw", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x1E, "pabsd", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x41, "phminposuw", MM_0F38 | PP_66, false, -1, false },
|
||||
|
||||
{ 0x20, "pmovsxbw", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x21, "pmovsxbd", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x22, "pmovsxbq", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x23, "pmovsxwd", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x24, "pmovsxwq", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x25, "pmovsxdq", MM_0F38 | PP_66, false, -1, false },
|
||||
|
||||
{ 0x30, "pmovzxbw", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x31, "pmovzxbd", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x32, "pmovzxbq", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x33, "pmovzxwd", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x34, "pmovzxwq", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x35, "pmovzxdq", MM_0F38 | PP_66, false, -1, false },
|
||||
|
||||
{ 0x70, "pshufd", MM_0F | PP_66, false, -1, true },
|
||||
{ 0x70, "pshufhw", MM_0F | PP_F3, false, -1, true },
|
||||
{ 0x70, "pshuflw", MM_0F | PP_F2, false, -1, true },
|
||||
|
||||
{ 0x17, "ptest", MM_0F38 | PP_66, false, -1, false },
|
||||
{ 0x53, "rcpps", MM_0F, true, -1, false },
|
||||
{ 0x52, "rsqrtps", MM_0F, true, -1, false },
|
||||
|
||||
{ 0x51, "sqrtpd", MM_0F | PP_66, true, -1, false },
|
||||
{ 0x51, "sqrtps", MM_0F, true, -1, false },
|
||||
|
||||
{ 0x2E, "ucomisd", MM_0F | PP_66, false, -1, false },
|
||||
{ 0x2E, "ucomiss", MM_0F, false, -1, false },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
std::string type = type2String(p->type);
|
||||
printf("void v%s(const Xmm& xm, const Operand& op%s) { opAVX_X_XM_IMM(xm, op, %s, 0x%02X, %s, %d%s); }\n"
|
||||
, p->name, p->hasIMM ? ", uint8 imm" : "", type.c_str(), p->code, p->supportYMM ? "true" : "false", p->w, p->hasIMM ? ", imm" : "");
|
||||
}
|
||||
}
|
||||
// (m, x), (m, y)
|
||||
{
|
||||
const struct Tbl {
|
||||
uint8 code;
|
||||
const char *name;
|
||||
int type;
|
||||
bool supportYMM;
|
||||
int w;
|
||||
} tbl[] = {
|
||||
{ 0x29, "movapd", MM_0F | PP_66, true, -1 },
|
||||
{ 0x29, "movaps", MM_0F, true, -1 },
|
||||
{ 0x7F, "movdqa", MM_0F | PP_66, true, -1 },
|
||||
{ 0x7F, "movdqu", MM_0F | PP_F3, true, -1 },
|
||||
{ 0x11, "movupd", MM_0F | PP_66, true, -1 },
|
||||
{ 0x11, "movups", MM_0F, true, -1 },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
std::string type = type2String(p->type);
|
||||
printf("void v%s(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, %s, 0x%02X, %s, %d); }\n"
|
||||
, p->name, type.c_str(), p->code, p->supportYMM ? "true" : "false", p->w);
|
||||
}
|
||||
}
|
||||
// (x, x/m), (y, y/m), (x, x, x/m), (y, y, y/m)
|
||||
{
|
||||
const struct Tbl {
|
||||
uint8 code;
|
||||
const char *name;
|
||||
int type;
|
||||
bool supportYMM;
|
||||
int w;
|
||||
} tbl[] = {
|
||||
{ 0xD0, "addsubpd", MM_0F | PP_66, true, -1 },
|
||||
{ 0xD0, "addsubps", MM_0F | PP_F2, true, -1 },
|
||||
{ 0x7C, "haddpd", MM_0F | PP_66, true, -1 },
|
||||
{ 0x7C, "haddps", MM_0F | PP_F2, true, -1 },
|
||||
{ 0x7D, "hsubpd", MM_0F | PP_66, true, -1 },
|
||||
{ 0x7D, "hsubps", MM_0F | PP_F2, true, -1 },
|
||||
|
||||
{ 0xDC, "aesenc", MM_0F38 | PP_66, false, 0 },
|
||||
{ 0xDD, "aesenclast", MM_0F38 | PP_66, false, 0 },
|
||||
{ 0xDE, "aesdec", MM_0F38 | PP_66, false, 0 },
|
||||
{ 0xDF, "aesdeclast", MM_0F38 | PP_66, false, 0 },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
std::string type = type2String(p->type);
|
||||
printf("void v%s(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, %s, 0x%02X, %s, %d); }\n"
|
||||
, p->name, type.c_str(), p->code, p->supportYMM ? "true" : "false", p->w);
|
||||
}
|
||||
}
|
||||
// vmaskmov
|
||||
{
|
||||
const char suf[][8] = { "ps", "pd" };
|
||||
for (int i = 0; i < 2; i++) {
|
||||
printf("void vmaskmov%s(const Xmm& xm1, const Xmm& xm2, const Address& addr) { opAVX_X_X_XM(xm1, xm2, addr, MM_0F38 | PP_66, 0x%02X, true, 0); }\n", suf[i], 0x2C + i);
|
||||
printf("void vmaskmov%s(const Address& addr, const Xmm& xm1, const Xmm& xm2) { opAVX_X_X_XM(xm2, xm1, addr, MM_0F38 | PP_66, 0x%02X, true, 0); }\n", suf[i], 0x2E + i);
|
||||
}
|
||||
}
|
||||
// vmov(h|l)(pd|ps)
|
||||
{
|
||||
const struct Tbl {
|
||||
bool isH;
|
||||
bool isPd;
|
||||
uint8 code;
|
||||
} tbl[] = {
|
||||
{ true, true, 0x16 },
|
||||
{ true, false, 0x16 },
|
||||
{ false, true, 0x12 },
|
||||
{ false, false, 0x12 },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl& p = tbl[i];
|
||||
char c = p.isH ? 'h' : 'l';
|
||||
const char *suf = p.isPd ? "pd" : "ps";
|
||||
const char *type = p.isPd ? "MM_0F | PP_66" : "MM_0F";
|
||||
printf("void vmov%c%s(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, op2, %s, 0x%02X, false); }\n"
|
||||
, c, suf, type, p.code);
|
||||
printf("void vmov%c%s(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, %s, 0x%02X, false); }\n"
|
||||
, c, suf, type, p.code + 1);
|
||||
}
|
||||
}
|
||||
// FMA
|
||||
{
|
||||
const struct Tbl {
|
||||
uint8 code;
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ 0x08, "vfmadd", true },
|
||||
{ 0x09, "vfmadd", false },
|
||||
{ 0x06, "vfmaddsub", true },
|
||||
{ 0x07, "vfmsubadd", true },
|
||||
{ 0x0A, "vfmsub", true },
|
||||
{ 0x0B, "vfmsub", false },
|
||||
{ 0x0C, "vfnmadd", true },
|
||||
{ 0x0D, "vfnmadd", false },
|
||||
{ 0x0E, "vfnmsub", true },
|
||||
{ 0x0F, "vfnmsub", false },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
for (int j = 0; j < 2; j++) {
|
||||
const char suf[][2][8] = {
|
||||
{ "pd", "ps" },
|
||||
{ "sd", "ss" },
|
||||
};
|
||||
for (int k = 0; k < 3; k++) {
|
||||
const struct Ord {
|
||||
const char *str;
|
||||
uint8 code;
|
||||
} ord[] = {
|
||||
{ "132", 0x90 },
|
||||
{ "213", 0xA0 },
|
||||
{ "231", 0xB0 },
|
||||
};
|
||||
printf("void %s%s%s(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x%02X, %s, %d); }\n"
|
||||
, tbl[i].name, ord[k].str, suf[tbl[i].supportYMM ? 0 : 1][j], tbl[i].code + ord[k].code, tbl[i].supportYMM ? "true" : "false", j == 0 ? 1 : 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
// FMA others
|
||||
{
|
||||
printf("void vaesimc(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, MM_0F38 | PP_66, 0xDB, false, 0); }\n");
|
||||
|
||||
printf("void vbroadcastf128(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, MM_0F38 | PP_66, 0x1A, true, 0); }\n");
|
||||
printf("void vbroadcastsd(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, MM_0F38 | PP_66, 0x19, true, 0); }\n");
|
||||
printf("void vbroadcastss(const Xmm& x, const Address& addr) { opAVX_X_XM_IMM(x, addr, MM_0F38 | PP_66, 0x18, true, 0); }\n");
|
||||
|
||||
printf("void vextractf128(const Operand& op, const Ymm& y, uint8 imm) { opAVX_X_XM_IMM(y, cvtReg(op, op.isXMM(), Operand::YMM), MM_0F3A | PP_66, 0x19, true, 0, imm); }\n");
|
||||
printf("void vinsertf128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8 imm) { opAVX_X_X_XM(y1, y2, cvtReg(op, op.isXMM(), Operand::YMM), MM_0F3A | PP_66, 0x18, true, 0); db(imm); }\n");
|
||||
printf("void vperm2f128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8 imm) { opAVX_X_X_XM(y1, y2, op, MM_0F3A | PP_66, 0x06, true, 0); db(imm); }\n");
|
||||
|
||||
printf("void vlddqu(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F | PP_F2, 0xF0, true, 0); }\n");
|
||||
printf("void vldmxcsr(const Address& addr) { opAVX_X_X_XM(xm2, xm0, addr, MM_0F, 0xAE, false, -1); }\n");
|
||||
printf("void vstmxcsr(const Address& addr) { opAVX_X_X_XM(xm3, xm0, addr, MM_0F, 0xAE, false, -1); }\n");
|
||||
printf("void vmaskmovdqu(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, MM_0F | PP_66, 0xF7, false, -1); }\n");
|
||||
|
||||
printf("void vpextrb(const Operand& op, const Xmm& x, uint8 imm) { if (!op.isREG(i32e) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, xm0, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x14, false); db(imm); }\n");
|
||||
printf("void vpextrw(const Reg& r, const Xmm& x, uint8 imm) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), MM_0F | PP_66, 0xC5, false); db(imm); }\n");
|
||||
printf("void vpextrw(const Address& addr, const Xmm& x, uint8 imm) { opAVX_X_X_XM(x, xm0, addr, MM_0F3A | PP_66, 0x15, false); db(imm); }\n");
|
||||
printf("void vpextrd(const Operand& op, const Xmm& x, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, xm0, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x16, false, 0); db(imm); }\n");
|
||||
|
||||
printf("void vpinsrb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x20, false); db(imm); }\n");
|
||||
printf("void vpinsrb(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x20, false); db(imm); }\n");
|
||||
|
||||
printf("void vpinsrw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F | PP_66, 0xC4, false); db(imm); }\n");
|
||||
printf("void vpinsrw(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F | PP_66, 0xC4, false); db(imm); }\n");
|
||||
|
||||
printf("void vpinsrd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 0); db(imm); }\n");
|
||||
printf("void vpinsrd(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 0); db(imm); }\n");
|
||||
|
||||
printf("void vpmovmskb(const Reg32e& r, const Xmm& x) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, x, MM_0F | PP_66, 0xD7, false); }\n");
|
||||
|
||||
}
|
||||
// (x, x, imm), (x, imm)
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
uint8 code;
|
||||
int idx;
|
||||
} tbl[] = {
|
||||
{ "pslldq", 0x73, 7 },
|
||||
{ "psrldq", 0x73, 3 },
|
||||
{ "psllw", 0x71, 6 },
|
||||
{ "pslld", 0x72, 6 },
|
||||
{ "psllq", 0x73, 6 },
|
||||
{ "psraw", 0x71, 4 },
|
||||
{ "psrad", 0x72, 4 },
|
||||
{ "psrlw", 0x71, 2 },
|
||||
{ "psrld", 0x72, 2 },
|
||||
{ "psrlq", 0x73, 2 },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl& p = tbl[i];
|
||||
printf("void v%s(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm%d, x1, x2, MM_0F | PP_66, 0x%02X, false); db(imm); }\n", p.name, p.idx, p.code);
|
||||
printf("void v%s(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm%d, x, x, MM_0F | PP_66, 0x%02X, false); db(imm); }\n", p.name, p.idx, p.code);
|
||||
}
|
||||
}
|
||||
// 4-op
|
||||
{
|
||||
printf("void vblendvpd(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, MM_0F3A | PP_66, 0x4B, true); db(x4.getIdx() << 4); }\n");
|
||||
printf("void vblendvpd(const Xmm& x1, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x1, op, MM_0F3A | PP_66, 0x4B, true); db(x4.getIdx() << 4); }\n");
|
||||
|
||||
printf("void vblendvps(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, MM_0F3A | PP_66, 0x4A, true); db(x4.getIdx() << 4); }\n");
|
||||
printf("void vblendvps(const Xmm& x1, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x1, op, MM_0F3A | PP_66, 0x4A, true); db(x4.getIdx() << 4); }\n");
|
||||
|
||||
printf("void vpblendvb(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, MM_0F3A | PP_66, 0x4C, false); db(x4.getIdx() << 4); }\n");
|
||||
printf("void vpblendvb(const Xmm& x1, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x1, op, MM_0F3A | PP_66, 0x4C, false); db(x4.getIdx() << 4); }\n");
|
||||
}
|
||||
// mov
|
||||
{
|
||||
printf("void vmovd(const Xmm& x, const Reg32& reg) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x6E, false, 0); }\n");
|
||||
printf("void vmovd(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0x6E, false, 0); }\n");
|
||||
printf("void vmovd(const Reg32& reg, const Xmm& x) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x7E, false, 0); }\n");
|
||||
printf("void vmovd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0x7E, false, 0); }\n");
|
||||
|
||||
printf("void vmovhlps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, op, MM_0F, 0x12, false); }\n");
|
||||
printf("void vmovlhps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, op, MM_0F, 0x16, false); }\n");
|
||||
|
||||
printf("void vmovmskpd(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), x.isXMM() ? xm0 : ym0, x, MM_0F | PP_66, 0x50, true, 0); }\n");
|
||||
printf("void vmovmskps(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), x.isXMM() ? xm0 : ym0, x, MM_0F, 0x50, true, 0); }\n");
|
||||
|
||||
printf("void vmovntdq(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F | PP_66, 0xE7, true); }\n");
|
||||
printf("void vmovntpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F | PP_66, 0x2B, true); }\n");
|
||||
printf("void vmovntps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F, 0x2B, true); }\n");
|
||||
printf("void vmovntdqa(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F38 | PP_66, 0x2A, false); }\n");
|
||||
|
||||
// vmovsd, vmovss
|
||||
for (int i = 0; i < 2; i++) {
|
||||
char c1 = i == 0 ? 'd' : 's';
|
||||
char c2 = i == 0 ? '2' : '3';
|
||||
printf("void vmovs%c(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, op, MM_0F | PP_F%c, 0x10, false); }\n", c1, c2);
|
||||
printf("void vmovs%c(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F%c, 0x10, false); }\n", c1, c2);
|
||||
printf("void vmovs%c(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F%c, 0x11, false); }\n", c1, c2);
|
||||
}
|
||||
}
|
||||
// cvt
|
||||
{
|
||||
printf("void vcvtss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2D, false, 0); }\n");
|
||||
printf("void vcvttss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2C, false, 0); }\n");
|
||||
printf("void vcvtsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2D, false, 0); }\n");
|
||||
printf("void vcvttsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2C, false, 0); }\n");
|
||||
|
||||
printf("void vcvtsi2ss(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !(op2.isREG(i32e) || op2.isMEM())) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, cvtReg(op2, op2.isREG(), Operand::XMM), MM_0F | PP_F3, 0x2A, false, (op1.isMEM() || op2.isMEM()) ? -1 : (op1.isREG(32) || op2.isREG(32)) ? 0 : 1); }\n");
|
||||
printf("void vcvtsi2sd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !(op2.isREG(i32e) || op2.isMEM())) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, cvtReg(op2, op2.isREG(), Operand::XMM), MM_0F | PP_F2, 0x2A, false, (op1.isMEM() || op2.isMEM()) ? -1 : (op1.isREG(32) || op2.isREG(32)) ? 0 : 1); }\n");
|
||||
|
||||
printf("void vcvtps2pd(const Xmm& x, const Operand& op) { if (!op.isMEM() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, cvtReg(op, !op.isMEM(), x.isXMM() ? Operand::XMM : Operand::YMM), MM_0F, 0x5A, true); }\n");
|
||||
printf("void vcvtdq2pd(const Xmm& x, const Operand& op) { if (!op.isMEM() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, cvtReg(op, !op.isMEM(), x.isXMM() ? Operand::XMM : Operand::YMM), MM_0F | PP_F3, 0xE6, true); }\n");
|
||||
|
||||
printf("void vcvtpd2ps(const Xmm& x, const Operand& op) { if (x.isYMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(op.isYMM() ? Ymm(x.getIdx()) : x, op.isYMM() ? ym0 : xm0, op, MM_0F | PP_66, 0x5A, true); }\n");
|
||||
printf("void vcvtpd2dq(const Xmm& x, const Operand& op) { if (x.isYMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(op.isYMM() ? Ymm(x.getIdx()) : x, op.isYMM() ? ym0 : xm0, op, MM_0F | PP_F2, 0xE6, true); }\n");
|
||||
printf("void vcvttpd2dq(const Xmm& x, const Operand& op) { if (x.isYMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(op.isYMM() ? Ymm(x.getIdx()) : x, op.isYMM() ? ym0 : xm0, op, MM_0F | PP_66, 0xE6, true); }\n");
|
||||
}
|
||||
// x64
|
||||
{
|
||||
|
||||
printf("#ifdef XBYAK64\n");
|
||||
printf("void vmovq(const Xmm& x, const Reg64& reg) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x6E, false, 1); }\n");
|
||||
printf("void vmovq(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F3, 0x7E, false, -1); }\n");
|
||||
printf("void vmovq(const Reg64& reg, const Xmm& x) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x7E, false, 1); }\n");
|
||||
printf("void vmovq(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0xD6, false, -1); }\n");
|
||||
printf("void vmovq(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, MM_0F | PP_F3, 0x7E, false, -1); }\n");
|
||||
|
||||
printf("void vpextrq(const Operand& op, const Xmm& x, uint8 imm) { if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, xm0, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x16, false, 1); db(imm); }\n");
|
||||
|
||||
printf("void vpinsrq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 1); db(imm); }\n");
|
||||
printf("void vpinsrq(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 1); db(imm); }\n");
|
||||
|
||||
printf("void vcvtss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2D, false, 1); }\n");
|
||||
printf("void vcvttss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2C, false, 1); }\n");
|
||||
printf("void vcvtsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2D, false, 1); }\n");
|
||||
printf("void vcvttsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2C, false, 1); }\n");
|
||||
printf("#endif\n");
|
||||
}
|
||||
}
|
||||
|
||||
int main()
|
||||
|
|
11
readme.txt
11
readme.txt
|
@ -1,5 +1,5 @@
|
|||
|
||||
C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak version 2.29
|
||||
C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak version 2.99
|
||||
|
||||
-----------------------------------------------------------------------------
|
||||
◎概要
|
||||
|
@ -14,12 +14,12 @@
|
|||
xbyak.hをインクルードするだけですぐ利用することができます.
|
||||
C++の枠組み内で閉じているため,外部アセンブラは不要です.
|
||||
32bit/64bit両対応です.
|
||||
対応ニーモニック:特権命令除くx86, MMX/MMX2/SSE/SSE2/SSE3/SSSE3/SSE4/FPU(一部)
|
||||
対応ニーモニック:特権命令除くx86, MMX/MMX2/SSE/SSE2/SSE3/SSSE3/SSE4/FPU(一部)/AVX
|
||||
|
||||
・Windows Xp(32bit, 64bit), Vista/Linux(32bit, 64bit)/Intel Mac対応
|
||||
Windows Xp上ではVC2005 Express Ed., VC2008
|
||||
Windows Xp上ではVC2005 Express Ed., VC2008, VC2010,
|
||||
Windows Vista
|
||||
Linux (kernel 2.4.32)上ではgcc 4.3.0, CentOS 5.1上ではgcc 4.1.2
|
||||
Linux (kernel 2.4.32)上ではgcc 4.5.0, CentOS 5.1上ではgcc 4.1.2
|
||||
Intel Mac
|
||||
などで動作確認をしています.
|
||||
|
||||
|
@ -199,6 +199,9 @@ sample/{echo,hello}.bfは http://www.kmonos.net/alang/etc/brainfuck.php から
|
|||
-----------------------------------------------------------------------------
|
||||
◎履歴
|
||||
|
||||
2011/02/04 ver 2.99 beta support AVX
|
||||
2010/12/08 ver 2.31 fix ptr [rip + 32bit offset], support rtdscp
|
||||
2010/10/19 ver 2.30 support pclmulqdq, aesdec, aesdeclast, aesenc, aesenclast, aesimc, aeskeygenassist
|
||||
2010/07/07 ver 2.29 fix call(<label>)
|
||||
2010/06/17 ver 2.28 move some member functions to public
|
||||
2010/06/01 ver 2.27 support encoding of mov(reg64, imm) like yasm(not nasm)
|
||||
|
|
15
readme_e.txt
15
readme_e.txt
|
@ -1,5 +1,5 @@
|
|||
|
||||
Xbyak 2.29 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
|
||||
Xbyak 2.99 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
|
||||
|
||||
-----------------------------------------------------------------------------
|
||||
<Abstract>
|
||||
|
@ -12,11 +12,11 @@ x64(AMD64, x86-64) mnemonic.
|
|||
header file only
|
||||
you can use Xbyak's functions at once if xbyak.h is included.
|
||||
|
||||
MMX/MMX2/SSE/SSE2/SSE3/SSSE3/SSE4/FPU(partial) are available.
|
||||
MMX/MMX2/SSE/SSE2/SSE3/SSSE3/SSE4/FPU(partial)/AVX are available.
|
||||
|
||||
Windows Xp(32bit, 64bit), Vista, Linux(32bit, 64bit), Intel Mac ready
|
||||
support Visual Studio C++ 2005 Express Ed., VC2008 Pro,
|
||||
mingw 3.4.2, icc 7.2, gcc 4.1.1, and so on.
|
||||
support Visual Studio C++ 2005 Express Ed., VC2008 Pro, VC2010,
|
||||
mingw 3.4.2, icc 7.2, gcc 4.5, and so on.
|
||||
|
||||
Note: "-fno-operator-names" option is required on gcc to avoid analyzing
|
||||
"and", "or", etc. as operators.
|
||||
|
@ -148,6 +148,9 @@ http://www.opensource.org/licenses/bsd-license.php
|
|||
-----------------------------------------------------------------------------
|
||||
<History>
|
||||
|
||||
2011/Feb/04 ver 2.99 beta support AVX
|
||||
2010/Dec/08 ver 2.31 fix ptr [rip + 32bit offset], support rdtscp
|
||||
2010/Oct/19 ver 2.30 support pclmulqdq, aesdec, aesdeclast, aesenc, aesenclast, aesimc, aeskeygenassist
|
||||
2010/Jun/07 ver 2.29 fix call(<label>)
|
||||
2010/Jun/17 ver 2.28 move some member functions to public
|
||||
2010/Jun/01 ver 2.27 support encoding of mov(reg64, imm) like yasm(not nasm)
|
||||
|
@ -187,5 +190,5 @@ http://www.opensource.org/licenses/bsd-license.php
|
|||
MITSUNARI Shigeo(herumi at nifty dot com)
|
||||
|
||||
---
|
||||
$Revision: 1.49 $
|
||||
$Date: 2010/07/07 01:00:04 $
|
||||
$Revision: 1.54 $
|
||||
$Date: 2011/02/04 03:27:59 $
|
||||
|
|
|
@ -14,12 +14,12 @@ endif
|
|||
ifeq ($(BIT),64)
|
||||
TARGET += test64 bf64 memfunc64 test_util64
|
||||
ifeq ($(BOOST_EXIT),1)
|
||||
TARGET += calc64
|
||||
TARGET += calc64 calc2_64
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(BOOST_EXIT),1)
|
||||
TARGET += calc
|
||||
TARGET += calc calc2
|
||||
endif
|
||||
|
||||
all: $(TARGET)
|
||||
|
@ -38,6 +38,10 @@ calc:
|
|||
g++ $(CFLAGS) calc.cpp -o $@ -m32
|
||||
calc64:
|
||||
g++ $(CFLAGS) calc.cpp -o $@ -m64
|
||||
#calc2:
|
||||
# g++ $(CFLAGS) calc2.cpp -o $@ -m32
|
||||
#calc2_64:
|
||||
# g++ $(CFLAGS) calc2.cpp -o $@ -m64
|
||||
|
||||
bf:
|
||||
g++ $(CFLAGS) bf.cpp -o $@ -m32
|
||||
|
@ -67,10 +71,13 @@ test64: test0.cpp $(XBYAK_INC)
|
|||
quantize : quantize.cpp $(XBYAK_INC)
|
||||
calc : calc.cpp $(XBYAK_INC)
|
||||
calc64 : calc.cpp $(XBYAK_INC)
|
||||
calc2 : calc2.cpp $(XBYAK_INC)
|
||||
calc2_64 : calc2.cpp $(XBYAK_INC)
|
||||
bf : bf.cpp $(XBYAK_INC)
|
||||
bf64 : bf.cpp $(XBYAK_INC)
|
||||
memfunc : memfunc.cpp $(XBYAK_INC)
|
||||
memfunc64 : memfunc.cpp $(XBYAK_INC)
|
||||
toyvm : toyvm.cpp $(XBYAK_INC)
|
||||
test_util : test_util.cpp $(XBYAK_INC) ../xbyak/xbyak_util.h
|
||||
test_util2 : test_util.cpp $(XBYAK_INC) ../xbyak/xbyak_util.h
|
||||
|
||||
|
|
|
@ -29,7 +29,7 @@ public:
|
|||
is.unget();
|
||||
return count;
|
||||
}
|
||||
Brainfuck(std::istream& is) : CodeGenerator(10000)
|
||||
Brainfuck(std::istream& is) : CodeGenerator(100000)
|
||||
{
|
||||
// void (*)(void* putchar, void* getchar, int *stack)
|
||||
using namespace Xbyak;
|
||||
|
@ -160,7 +160,7 @@ public:
|
|||
|
||||
void dump(const Xbyak::uint8 *code, size_t size)
|
||||
{
|
||||
puts("#include <stdio.h>\nstatic int stack[32768];\nstatic const unsigned char code[] = {");
|
||||
puts("#include <stdio.h>\nstatic int stack[128 * 1024];\nstatic const unsigned char code[] = {");
|
||||
for (size_t i = 0; i < size; i++) {
|
||||
printf("0x%02x,", code[i]); if ((i % 16) == 15) putchar('\n');
|
||||
}
|
||||
|
@ -183,9 +183,9 @@ void dump(const Xbyak::uint8 *code, size_t size)
|
|||
int main(int argc, char *argv[])
|
||||
{
|
||||
#ifdef XBYAK32
|
||||
puts("32bit mode");
|
||||
fprintf(stderr, "32bit mode\n");
|
||||
#else
|
||||
puts("64bit mode");
|
||||
fprintf(stderr, "64bit mode\n");
|
||||
#endif
|
||||
if (argc == 1) {
|
||||
fprintf(stderr, "bf filename.bf [0|1]\n");
|
||||
|
@ -193,13 +193,18 @@ int main(int argc, char *argv[])
|
|||
}
|
||||
std::ifstream ifs(argv[1]);
|
||||
int mode = argc == 3 ? atoi(argv[2]) : 0;
|
||||
Brainfuck bf(ifs);
|
||||
if (mode == 0) {
|
||||
static int stack[32768];
|
||||
((void (*)(void*, void*, int *))bf.getCode())((void*)putchar, (void*)getchar, stack);
|
||||
} else {
|
||||
dump(bf.getCode(), bf.getSize());
|
||||
try {
|
||||
Brainfuck bf(ifs);
|
||||
if (mode == 0) {
|
||||
static int stack[128 * 1024];
|
||||
((void (*)(void*, void*, int *))bf.getCode())((void*)putchar, (void*)getchar, stack);
|
||||
} else {
|
||||
dump(bf.getCode(), bf.getSize());
|
||||
}
|
||||
} catch (Xbyak::Error err) {
|
||||
printf("ERR:%s(%d)\n", Xbyak::ConvertErrorToString(err), err);
|
||||
} catch (...) {
|
||||
printf("unknown error\n");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -1,12 +1,12 @@
|
|||
/*
|
||||
@author herumi
|
||||
@date $Date: 2010/04/15 06:52:07 $
|
||||
@date $Date: 2010/11/17 02:58:03 $
|
||||
|
||||
tiny calculator 2
|
||||
tiny calculator
|
||||
This program generates a function to calc the value of
|
||||
polynomial given by user in run-time.
|
||||
use boost::sprit
|
||||
|
||||
use boost::spirit::classic
|
||||
see calc2.cpp for new version of boost::spirit
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <sstream>
|
||||
|
@ -16,8 +16,6 @@
|
|||
#pragma warning(disable : 4127) // for boost(constant condition)
|
||||
#pragma warning(disable : 4512) // for boost
|
||||
#endif
|
||||
//#include <boost/spirit/iterator/file_iterator.hpp>
|
||||
//#include <boost/spirit/core.hpp>
|
||||
#include <boost/spirit/include/classic_file_iterator.hpp>
|
||||
#include <boost/spirit/include/classic_core.hpp>
|
||||
#include <boost/bind.hpp>
|
||||
|
|
|
@ -138,6 +138,5 @@ int main()
|
|||
} catch (...) {
|
||||
printf("unknown error\n");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -4,6 +4,15 @@
|
|||
|
||||
#define NUM_OF_ARRAY(x) (sizeof(x) / sizeof(x[0]))
|
||||
|
||||
struct PopCountTest : public Xbyak::CodeGenerator {
|
||||
PopCountTest(int n)
|
||||
{
|
||||
mov(eax, n);
|
||||
popcnt(eax, eax);
|
||||
ret();
|
||||
}
|
||||
};
|
||||
|
||||
void putCPUinfo()
|
||||
{
|
||||
using namespace Xbyak::util;
|
||||
|
@ -27,18 +36,34 @@ void putCPUinfo()
|
|||
{ Cpu::tE3DN, "e3dn" },
|
||||
{ Cpu::tSSE4a, "sse4a" },
|
||||
{ Cpu::tSSE5, "sse5" },
|
||||
{ Cpu::tAESNI, "aesni" },
|
||||
{ Cpu::tRDTSCP, "rdtscp" },
|
||||
{ Cpu::tOSXSACE, "osxsace(xgetvb)" },
|
||||
{ Cpu::tPCLMULQDQ, "pclmulqdq" },
|
||||
{ Cpu::tAVX, "avx" },
|
||||
{ Cpu::tFMA, "fma" },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
if (cpu.has(tbl[i].type)) printf(" %s", tbl[i].str);
|
||||
}
|
||||
printf("\n");
|
||||
if (cpu.has(Cpu::tPOPCNT)) {
|
||||
const int n = 0x12345678; // bitcount = 13
|
||||
const int ok = 13;
|
||||
int r = ((int (*)())(PopCountTest(n).getCode()))();
|
||||
if (r == ok) {
|
||||
puts("popcnt ok");
|
||||
} else {
|
||||
printf("popcnt ng %d %d\n", r, ok);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef XBYAK32
|
||||
struct EipTest : public Xbyak::util::EnableSetEip<Xbyak::CodeGenerator> {
|
||||
struct EipTest : public Xbyak::CodeGenerator {
|
||||
EipTest()
|
||||
{
|
||||
setEipTo(eax);
|
||||
Xbyak::util::setEipTo(this, eax);
|
||||
ret();
|
||||
}
|
||||
};
|
||||
|
|
|
@ -32,6 +32,11 @@ test: normalize_prefix jmp
|
|||
./test_address.sh 64
|
||||
./jmp
|
||||
|
||||
test_avx:
|
||||
./test_avx.sh
|
||||
./test_avx.sh Y
|
||||
./test_avx.sh 64
|
||||
./test_avx.sh Y64
|
||||
clean:
|
||||
rm -rf *.o $(TARGET)
|
||||
|
||||
|
|
698
test/make_nm.cpp
698
test/make_nm.cpp
|
@ -8,7 +8,7 @@ using namespace Xbyak;
|
|||
const int bitEnd = 64;
|
||||
|
||||
const uint64 MMX = 1ULL << 0;
|
||||
const uint64 XMM = 1ULL << 1;
|
||||
const uint64 _XMM = 1ULL << 1;
|
||||
const uint64 _MEM = 1ULL << 2;
|
||||
const uint64 _REG32 = 1ULL << 3;
|
||||
const uint64 EAX = 1ULL << 4;
|
||||
|
@ -30,15 +30,18 @@ const uint64 ONE = 1ULL << 19;
|
|||
const uint64 CL = 1ULL << 20;
|
||||
const uint64 MEM_ONLY_DISP = 1ULL << 21;
|
||||
const uint64 NEG32 = 1ULL << 23;
|
||||
const uint64 _YMM = 1ULL << 24;
|
||||
#ifdef XBYAK64
|
||||
const uint64 _MEMe = 1ULL << 22;
|
||||
const uint64 REG32_2 = 1ULL << 24; // r8d, ...
|
||||
const uint64 REG16_2 = 1ULL << 25; // r8w, ...
|
||||
const uint64 REG8_2 = 1ULL << 26; // r8b, ...
|
||||
const uint64 REG8_3 = 1ULL << 27; // spl, ...
|
||||
const uint64 _REG64 = 1ULL << 28; // rax, ...
|
||||
const uint64 _REG64_2 = 1ULL << 29; // r8, ...
|
||||
const uint64 RAX = 1ULL << 30;
|
||||
const uint64 _MEMe = 1ULL << 25;
|
||||
const uint64 REG32_2 = 1ULL << 26; // r8d, ...
|
||||
const uint64 REG16_2 = 1ULL << 27; // r8w, ...
|
||||
const uint64 REG8_2 = 1ULL << 28; // r8b, ...
|
||||
const uint64 REG8_3 = 1ULL << 29; // spl, ...
|
||||
const uint64 _REG64 = 1ULL << 30; // rax, ...
|
||||
const uint64 _REG64_2 = 1ULL << 31; // r8, ...
|
||||
const uint64 RAX = 1ULL << 32;
|
||||
const uint64 _XMM2 = 1ULL << 33;
|
||||
const uint64 _YMM2 = 1ULL << 34;
|
||||
#else
|
||||
const uint64 _MEMe = 0;
|
||||
const uint64 REG32_2 = 0;
|
||||
|
@ -48,6 +51,8 @@ const uint64 REG8_3 = 0;
|
|||
const uint64 _REG64 = 0;
|
||||
const uint64 _REG64_2 = 0;
|
||||
const uint64 RAX = 0;
|
||||
const uint64 _XMM2 = 0;
|
||||
const uint64 _YMM2 = 0;
|
||||
#endif
|
||||
const uint64 REG64 = _REG64 | _REG64_2 | RAX;
|
||||
const uint64 REG32 = _REG32 | REG32_2 | EAX;
|
||||
|
@ -55,16 +60,18 @@ const uint64 REG16 = _REG16 | REG16_2 | AX;
|
|||
const uint64 REG32e = REG32 | REG64;
|
||||
const uint64 REG8 = _REG8 | REG8_2|AL;
|
||||
const uint64 MEM = _MEM | _MEMe;
|
||||
const uint64 MEM64 = 1ULL << 31;
|
||||
const uint64 ST0 = 1ULL << 32;
|
||||
const uint64 STi = 1ULL << 33;
|
||||
const uint64 MEM64 = 1ULL << 35;
|
||||
const uint64 ST0 = 1ULL << 36;
|
||||
const uint64 STi = 1ULL << 37;
|
||||
const uint64 XMM = _XMM | _XMM2;
|
||||
const uint64 YMM = _YMM | _YMM2;
|
||||
const uint64 NOPARA = 1ULL << (bitEnd - 1);
|
||||
|
||||
class Test {
|
||||
const bool isXbyak_;
|
||||
int funcNum_;
|
||||
// check all op1, op2, op3
|
||||
void put(const char *nm, uint64 op1 = NOPARA, uint64 op2 = NOPARA, uint64 op3 = NOPARA) const
|
||||
void put(const char *nm, uint64 op1 = NOPARA, uint64 op2 = NOPARA, uint64 op3 = NOPARA, uint64 op4 = NOPARA) const
|
||||
{
|
||||
for (int i = 0; i < bitEnd; i++) {
|
||||
if ((op1 & (1ULL << i)) == 0) continue;
|
||||
|
@ -72,13 +79,17 @@ class Test {
|
|||
if ((op2 & (1ULL << j)) == 0) continue;
|
||||
for (int k = 0; k < bitEnd; k++) {
|
||||
if ((op3 & (1ULL << k)) == 0) continue;
|
||||
printf("%s ", nm);
|
||||
if (isXbyak_) printf("(");
|
||||
if (!(op1 & NOPARA)) printf("%s", get(1ULL << i));
|
||||
if (!(op2 & NOPARA)) printf(", %s", get(1ULL << j));
|
||||
if (!(op3 & NOPARA)) printf(", %s", get(1ULL << k));
|
||||
if (isXbyak_) printf("); dump();");
|
||||
printf("\n");
|
||||
for (int s = 0; s < bitEnd; s++) {
|
||||
if ((op4 & (1ULL << s)) == 0) continue;
|
||||
printf("%s ", nm);
|
||||
if (isXbyak_) printf("(");
|
||||
if (!(op1 & NOPARA)) printf("%s", get(1ULL << i));
|
||||
if (!(op2 & NOPARA)) printf(", %s", get(1ULL << j));
|
||||
if (!(op3 & NOPARA)) printf(", %s", get(1ULL << k));
|
||||
if (!(op4 & NOPARA)) printf(", %s", get(1ULL << s));
|
||||
if (isXbyak_) printf("); dump();");
|
||||
printf("\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -125,23 +136,36 @@ class Test {
|
|||
};
|
||||
return MmxTbl[idx];
|
||||
}
|
||||
case XMM:
|
||||
case _XMM:
|
||||
{
|
||||
static const char XmmTbl[][6] = {
|
||||
static const char tbl[][6] = {
|
||||
"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
|
||||
};
|
||||
return tbl[idx];
|
||||
}
|
||||
case _YMM:
|
||||
{
|
||||
static const char tbl[][6] = {
|
||||
"ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7"
|
||||
};
|
||||
return tbl[idx];
|
||||
}
|
||||
#ifdef XBYAK64
|
||||
case _XMM2:
|
||||
{
|
||||
static const char tbl[][6] = {
|
||||
"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
|
||||
};
|
||||
static const char MyXmmTbl[][6] = {
|
||||
"xm0", "xm1", "xm2", "xm3", "xm4", "xm5", "xm6", "xm7",
|
||||
"xm8", "xm9", "xm10", "xm11", "xm12", "xm13", "xm14", "xm15"
|
||||
};
|
||||
#ifdef XBYAK64
|
||||
const int adj = 4;
|
||||
#else
|
||||
const int adj = 0;
|
||||
#endif
|
||||
return isXbyak_ ? MyXmmTbl[idx + adj] : XmmTbl[idx + adj];
|
||||
return tbl[idx];
|
||||
}
|
||||
case _YMM2:
|
||||
{
|
||||
static const char tbl[][6] = {
|
||||
"ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
|
||||
};
|
||||
return tbl[idx];
|
||||
}
|
||||
#endif
|
||||
case _MEM:
|
||||
return isXbyak_ ? "ptr[eax+ecx+3]" : "[eax+ecx+3]";
|
||||
case _MEMe:
|
||||
|
@ -268,7 +292,7 @@ class Test {
|
|||
}
|
||||
void putSIMPLE() const
|
||||
{
|
||||
const char tbl[][10] = {
|
||||
const char tbl[][20] = {
|
||||
#ifdef XBYAK64
|
||||
"cdqe",
|
||||
#else
|
||||
|
@ -325,6 +349,10 @@ class Test {
|
|||
"popf",
|
||||
"pushf",
|
||||
|
||||
"xgetbv",
|
||||
"vzeroall",
|
||||
"vzeroupper",
|
||||
|
||||
"f2xm1",
|
||||
"fabs",
|
||||
"faddp",
|
||||
|
@ -373,6 +401,7 @@ class Test {
|
|||
|
||||
put("bswap", REG32e);
|
||||
put("lea", REG32e, MEM);
|
||||
#if 0
|
||||
#ifdef XBYAK64
|
||||
put("jmp", REG64);
|
||||
put("call", REG64);
|
||||
|
@ -380,9 +409,41 @@ class Test {
|
|||
put("jmp", REG32);
|
||||
put("call", REG32);
|
||||
#endif
|
||||
put("jmp", MEM);
|
||||
put("jmp", MEM);
|
||||
put("jmp", MEM);
|
||||
put("call", REG16|MEM|MEM_ONLY_DISP);
|
||||
put("call", "getCode() + 5", "$ + 5");
|
||||
#endif
|
||||
}
|
||||
void putJmp() const
|
||||
{
|
||||
#ifdef XBYAK64
|
||||
put("jmp", REG64);
|
||||
put("call", REG64);
|
||||
#else
|
||||
put("jmp", REG32);
|
||||
put("call", REG32);
|
||||
#endif
|
||||
put("jmp", MEM);
|
||||
put("jmp", MEM);
|
||||
put("jmp", MEM);
|
||||
put("call", REG16|MEM|MEM_ONLY_DISP);
|
||||
#ifndef USE_YASM
|
||||
// call(ptr [getCode() + 5]); means to construct the opecode of "call"
|
||||
// after calling getCode().
|
||||
// Its behavior is same as NASM(MASM). YASM makes different opecode.
|
||||
put("call", "getCode() + 5", "$ + 5");
|
||||
#endif
|
||||
|
||||
#ifdef XBYAK64
|
||||
put("jmp", "ptr[(void*)0x12345678]", "[0x12345678]");
|
||||
put("call", "ptr[(void*)0x12345678]", "[0x12345678]");
|
||||
#ifdef USE_YASM
|
||||
put("jmp", "ptr[rip + 0x12345678]", "[rip+0x12345678]");
|
||||
put("call", "ptr[rip + 0x12345678]", "[rip+0x12345678]");
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
void putMMX1() const
|
||||
{
|
||||
|
@ -642,8 +703,8 @@ class Test {
|
|||
{
|
||||
static const struct Tbl {
|
||||
const char *name;
|
||||
int op1;
|
||||
int op2;
|
||||
uint64 op1;
|
||||
uint64 op2;
|
||||
} tbl[] = {
|
||||
{ "cvtpi2ps", XMM, MMX|MEM },
|
||||
{ "cvtps2pi", MMX, XMM|MEM },
|
||||
|
@ -993,6 +1054,11 @@ class Test {
|
|||
"pmulld",
|
||||
"phminposuw",
|
||||
"pcmpgtq",
|
||||
"aesdec",
|
||||
"aesdeclast",
|
||||
"aesenc",
|
||||
"aesenclast",
|
||||
"aesimc",
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const char *p = tbl[i];
|
||||
|
@ -1016,6 +1082,8 @@ class Test {
|
|||
"pcmpestri",
|
||||
"pcmpistrm",
|
||||
"pcmpistri",
|
||||
"pclmulqdq",
|
||||
"aeskeygenassist",
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const char *p = tbl[i];
|
||||
|
@ -1035,6 +1103,10 @@ class Test {
|
|||
put("popcnt", REG64, REG64|MEM);
|
||||
put("crc32", REG32, REG8|REG16|REG32|MEM8|MEM16|MEM32);
|
||||
put("crc32", REG64, REG64|REG8|MEM8);
|
||||
#ifdef XBYAK64
|
||||
put("pextrq", REG64|MEM, XMM, IMM);
|
||||
put("pinsrq", XMM, REG64|MEM, IMM);
|
||||
#endif
|
||||
}
|
||||
void putFpuMem16_32() const
|
||||
{
|
||||
|
@ -1140,6 +1212,545 @@ class Test {
|
|||
put(tbl[i], STi);
|
||||
}
|
||||
}
|
||||
void putAVX1()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool only_pd_ps;
|
||||
} tbl[] = {
|
||||
{ "add", false },
|
||||
{ "sub", false },
|
||||
{ "mul", false },
|
||||
{ "div", false },
|
||||
{ "max", false },
|
||||
{ "min", false },
|
||||
{ "and", true },
|
||||
{ "andn", true },
|
||||
{ "or", true },
|
||||
{ "xor", true },
|
||||
|
||||
{ "addsub", true },
|
||||
{ "hadd", true },
|
||||
{ "hsub", true },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const struct Suf {
|
||||
const char *suf;
|
||||
bool supportYMM;
|
||||
} suf[] = {
|
||||
{ "pd", true },
|
||||
{ "ps", true },
|
||||
{ "sd", false },
|
||||
{ "ss", false },
|
||||
};
|
||||
for (size_t j = 0; j < NUM_OF_ARRAY(suf); j++) {
|
||||
if (tbl[i].only_pd_ps && j == 2) break;
|
||||
std::string name = std::string("v") + tbl[i].name + suf[j].suf;
|
||||
const char *p = name.c_str();
|
||||
put(p, XMM, XMM | MEM);
|
||||
put(p, XMM, XMM, XMM | MEM);
|
||||
if (!suf[j].supportYMM) continue;
|
||||
put(p, YMM, YMM | MEM);
|
||||
put(p, YMM, YMM, YMM | MEM);
|
||||
}
|
||||
}
|
||||
}
|
||||
void putAVX_X_X_XM_omit()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vaesenc", false },
|
||||
{ "vaesenclast", false },
|
||||
{ "vaesdec", false },
|
||||
{ "vaesdeclast", false },
|
||||
{ "vcvtsd2ss", false },
|
||||
{ "vcvtss2sd", false },
|
||||
{ "vpacksswb", false },
|
||||
{ "vpackssdw", false },
|
||||
{ "vpackuswb", false },
|
||||
{ "vpackusdw", false },
|
||||
|
||||
{ "vpaddb", false },
|
||||
{ "vpaddw", false },
|
||||
{ "vpaddd", false },
|
||||
{ "vpaddq", false },
|
||||
|
||||
{ "vpaddsb", false },
|
||||
{ "vpaddsw", false },
|
||||
|
||||
{ "vpaddusb", false },
|
||||
{ "vpaddusw", false },
|
||||
|
||||
{ "vpand", false },
|
||||
{ "vpandn", false },
|
||||
{ "vpavgb", false },
|
||||
{ "vpavgw", false },
|
||||
|
||||
{ "vpcmpeqb", false },
|
||||
{ "vpcmpeqw", false },
|
||||
{ "vpcmpeqd", false },
|
||||
// { "vpcmpeqq", false }, // QQQ : nasm(2.09.04) may be wrong
|
||||
|
||||
{ "vpcmpgtb", false },
|
||||
{ "vpcmpgtw", false },
|
||||
{ "vpcmpgtd", false },
|
||||
// { "vpcmpgtq", false }, // QQQ
|
||||
|
||||
{ "vphaddw", false },
|
||||
{ "vphaddd", false },
|
||||
{ "vphaddsw", false },
|
||||
|
||||
{ "vphsubw", false },
|
||||
{ "vphsubd", false },
|
||||
{ "vphsubsw", false },
|
||||
{ "vpmaddwd", false },
|
||||
{ "vpmaddubsw", false },
|
||||
|
||||
{ "vpmaxsb", false },
|
||||
{ "vpmaxsw", false },
|
||||
{ "vpmaxsd", false },
|
||||
|
||||
{ "vpmaxub", false },
|
||||
{ "vpmaxuw", false },
|
||||
{ "vpmaxud", false },
|
||||
|
||||
{ "vpminsb", false },
|
||||
{ "vpminsw", false },
|
||||
{ "vpminsd", false },
|
||||
|
||||
{ "vpminub", false },
|
||||
{ "vpminuw", false },
|
||||
{ "vpminud", false },
|
||||
|
||||
{ "vpmulhuw", false },
|
||||
{ "vpmulhrsw", false },
|
||||
{ "vpmulhw", false },
|
||||
{ "vpmullw", false },
|
||||
{ "vpmulld", false },
|
||||
|
||||
{ "vpmuludq", false },
|
||||
{ "vpmuldq", false },
|
||||
|
||||
{ "vpor", false },
|
||||
{ "vpsadbw", false },
|
||||
|
||||
{ "vpsignb", false },
|
||||
{ "vpsignw", false },
|
||||
{ "vpsignd", false },
|
||||
|
||||
{ "vpsllw", false },
|
||||
{ "vpslld", false },
|
||||
{ "vpsllq", false },
|
||||
|
||||
{ "vpsraw", false },
|
||||
{ "vpsrad", false },
|
||||
{ "vpsrlw", false },
|
||||
{ "vpsrld", false },
|
||||
{ "vpsrlq", false },
|
||||
|
||||
{ "vpsubb", false },
|
||||
{ "vpsubw", false },
|
||||
{ "vpsubd", false },
|
||||
{ "vpsubq", false },
|
||||
|
||||
{ "vpsubsb", false },
|
||||
{ "vpsubsw", false },
|
||||
|
||||
{ "vpsubusb", false },
|
||||
{ "vpsubusw", false },
|
||||
|
||||
{ "vpunpckhbw", false },
|
||||
{ "vpunpckhwd", false },
|
||||
{ "vpunpckhdq", false },
|
||||
{ "vpunpckhqdq", false },
|
||||
|
||||
{ "vpunpcklbw", false },
|
||||
{ "vpunpcklwd", false },
|
||||
{ "vpunpckldq", false },
|
||||
{ "vpunpcklqdq", false },
|
||||
|
||||
{ "vpxor", false },
|
||||
{ "vsqrtsd", false },
|
||||
{ "vsqrtss", false },
|
||||
|
||||
{ "vunpckhpd", true },
|
||||
{ "vunpckhps", true },
|
||||
{ "vunpcklpd", true },
|
||||
{ "vunpcklps", true },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
put(p->name, XMM, XMM | MEM);
|
||||
put(p->name, XMM, XMM, XMM | MEM);
|
||||
if (!p->supportYMM) continue;
|
||||
put(p->name, YMM, YMM | MEM);
|
||||
put(p->name, YMM, YMM, YMM | MEM);
|
||||
}
|
||||
}
|
||||
void putAVX_X_X_XM_IMM()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vblendpd", true },
|
||||
{ "vblendps", true },
|
||||
{ "vdppd", false },
|
||||
{ "vdpps", true },
|
||||
{ "vmpsadbw", false },
|
||||
{ "vpblendw", false },
|
||||
{ "vroundsd", false },
|
||||
{ "vroundss", false },
|
||||
{ "vpclmulqdq", false },
|
||||
{ "vcmppd", true },
|
||||
{ "vcmpps", true },
|
||||
{ "vcmpsd", false },
|
||||
{ "vcmpss", false },
|
||||
{ "vinsertps", false },
|
||||
{ "vpalignr", false },
|
||||
{ "vshufpd", true },
|
||||
{ "vshufps", true },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
put(p->name, XMM, XMM, XMM | MEM, IMM);
|
||||
put(p->name, XMM, XMM | MEM, IMM);
|
||||
if (!p->supportYMM) continue;
|
||||
put(p->name, YMM, YMM, YMM | MEM, IMM);
|
||||
put(p->name, YMM, YMM | MEM, IMM);
|
||||
}
|
||||
}
|
||||
void putAVX_X_XM_IMM()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vroundpd", true },
|
||||
{ "vroundps", true },
|
||||
{ "vpcmpestri", false },
|
||||
{ "vpcmpestrm", false },
|
||||
{ "vpcmpistri", false },
|
||||
{ "vpcmpistrm", false },
|
||||
{ "vpermilpd", true },
|
||||
{ "vpermilps", true },
|
||||
{ "vaeskeygenassist", false },
|
||||
{ "vpshufd", false },
|
||||
{ "vpshufhw", false },
|
||||
{ "vpshuflw", false },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
put(p->name, XMM, XMM | MEM, IMM);
|
||||
if (!p->supportYMM) continue;
|
||||
put(p->name, YMM, YMM | MEM, IMM);
|
||||
}
|
||||
}
|
||||
void putAVX_X_X_XM()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vpermilpd", true },
|
||||
{ "vpermilps", true },
|
||||
{ "vpshufb", false },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
put(p->name, XMM, XMM, XMM | MEM);
|
||||
if (!p->supportYMM) continue;
|
||||
put(p->name, YMM, YMM, YMM | MEM);
|
||||
}
|
||||
}
|
||||
void putAVX_X_XM()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vaesimc", false },
|
||||
{ "vtestps", true },
|
||||
{ "vtestpd", true },
|
||||
{ "vcomisd", false },
|
||||
{ "vcomiss", false },
|
||||
{ "vcvtdq2ps", true },
|
||||
{ "vcvtps2dq", true },
|
||||
{ "vcvttps2dq", true },
|
||||
{ "vmovapd", true },
|
||||
{ "vmovaps", true },
|
||||
{ "vmovddup", true },
|
||||
{ "vmovdqa", true },
|
||||
{ "vmovdqu", true },
|
||||
{ "vmovupd", true },
|
||||
{ "vmovups", true },
|
||||
|
||||
{ "vpabsb", false },
|
||||
{ "vpabsw", false },
|
||||
{ "vpabsd", false },
|
||||
{ "vphminposuw", false },
|
||||
|
||||
{ "vpmovsxbw", false },
|
||||
{ "vpmovsxbd", false },
|
||||
{ "vpmovsxbq", false },
|
||||
{ "vpmovsxwd", false },
|
||||
{ "vpmovsxwq", false },
|
||||
{ "vpmovsxdq", false },
|
||||
|
||||
{ "vpmovzxbw", false },
|
||||
{ "vpmovzxbd", false },
|
||||
{ "vpmovzxbq", false },
|
||||
{ "vpmovzxwd", false },
|
||||
{ "vpmovzxwq", false },
|
||||
{ "vpmovzxdq", false },
|
||||
|
||||
{ "vptest", false },
|
||||
{ "vrcpps", true },
|
||||
{ "vrcpss", false },
|
||||
|
||||
{ "vrsqrtps", true },
|
||||
{ "vrsqrtss", false },
|
||||
|
||||
{ "vsqrtpd", true },
|
||||
{ "vsqrtps", true },
|
||||
{ "vucomisd", false },
|
||||
{ "vucomiss", false },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
put(p->name, XMM, XMM | MEM);
|
||||
if (!p->supportYMM) continue;
|
||||
put(p->name, YMM, YMM | MEM);
|
||||
}
|
||||
}
|
||||
void putAVX_M_X()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vmovapd", true },
|
||||
{ "vmovaps", true },
|
||||
{ "vmovdqa", true },
|
||||
{ "vmovdqu", true },
|
||||
{ "vmovupd", true },
|
||||
{ "vmovups", true },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl *p = &tbl[i];
|
||||
put(p->name, MEM, XMM);
|
||||
if (!p->supportYMM) continue;
|
||||
put(p->name, MEM, YMM);
|
||||
}
|
||||
}
|
||||
void putAVX_X_X_IMM_omit()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
} tbl[] = {
|
||||
{ "vpslldq" },
|
||||
{ "vpsrldq" },
|
||||
{ "vpsllw" },
|
||||
{ "vpslld" },
|
||||
{ "vpsllq" },
|
||||
{ "vpsraw" },
|
||||
{ "vpsrad" },
|
||||
{ "vpsrlw" },
|
||||
{ "vpsrld" },
|
||||
{ "vpsrlq" },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl& p = tbl[i];
|
||||
put(p.name, XMM, XMM, IMM);
|
||||
put(p.name, XMM, IMM);
|
||||
}
|
||||
}
|
||||
void putFMA()
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vfmadd", true },
|
||||
{ "vfmadd", false },
|
||||
{ "vfmaddsub", true },
|
||||
{ "vfmsubadd", true },
|
||||
{ "vfmsub", true },
|
||||
{ "vfmsub", false },
|
||||
{ "vfnmadd", true },
|
||||
{ "vfnmadd", false },
|
||||
{ "vfnmsub", true },
|
||||
{ "vfnmsub", false },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl& p = tbl[i];
|
||||
const struct Ord {
|
||||
const char *name;
|
||||
} ord[] = {
|
||||
{ "132" },
|
||||
{ "213" },
|
||||
{ "231" },
|
||||
};
|
||||
for (size_t j = 0; j < NUM_OF_ARRAY(ord); j++) {
|
||||
const char suf[][2][8] = {
|
||||
{ "pd", "ps" },
|
||||
{ "sd", "ss" },
|
||||
};
|
||||
for (size_t k = 0; k < 2; k++) {
|
||||
std::string name = std::string(p.name) + ord[j].name + suf[p.supportYMM ? 0 : 1][k];
|
||||
const char *q = name.c_str();
|
||||
put(q, XMM, XMM, XMM | MEM);
|
||||
if (!p.supportYMM) continue;
|
||||
put(q, YMM, YMM, YMM | MEM);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
void putAVX2()
|
||||
{
|
||||
put("vextractps", REG32 | MEM, XMM, IMM);
|
||||
put("vldmxcsr", MEM);
|
||||
put("vstmxcsr", MEM);
|
||||
put("vmaskmovdqu", XMM, XMM);
|
||||
|
||||
put("vmovd", XMM, REG32 | MEM);
|
||||
put("vmovd", REG32 | MEM, XMM);
|
||||
|
||||
put("vmovhlps", XMM, XMM);
|
||||
put("vmovhlps", XMM, XMM, XMM);
|
||||
put("vmovlhps", XMM, XMM);
|
||||
put("vmovlhps", XMM, XMM, XMM);
|
||||
|
||||
{
|
||||
const char tbl[][16] = {
|
||||
"vmovhpd",
|
||||
"vmovhps",
|
||||
"vmovlpd",
|
||||
"vmovlps",
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
put(tbl[i], XMM, XMM, MEM);
|
||||
put(tbl[i], XMM, MEM);
|
||||
put(tbl[i], MEM, XMM);
|
||||
}
|
||||
}
|
||||
put("vmovmskpd", REG32e, XMM | YMM);
|
||||
put("vmovmskps", REG32e, XMM | YMM);
|
||||
|
||||
put("vmovntdq", MEM, XMM | YMM);
|
||||
put("vmovntpd", MEM, XMM | YMM);
|
||||
put("vmovntps", MEM, XMM | YMM);
|
||||
put("vmovntdqa", XMM, MEM);
|
||||
|
||||
{
|
||||
const char tbl[][8] = { "vmovsd", "vmovss" };
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
put(tbl[i], XMM, XMM, XMM);
|
||||
put(tbl[i], XMM, XMM | MEM);
|
||||
put(tbl[i], MEM, XMM);
|
||||
}
|
||||
}
|
||||
put("vpextrb", REG32e|MEM, XMM, IMM);
|
||||
put("vpextrw", REG32e, XMM, IMM);
|
||||
put("vpextrd", REG32|MEM, XMM, IMM);
|
||||
|
||||
for (int i = 0; i < 3; i++) {
|
||||
const char tbl[][8] = { "vpinsrb", "vpinsrw", "vpinsrd" };
|
||||
put(tbl[i], XMM, XMM, REG32|MEM, IMM);
|
||||
put(tbl[i], XMM, REG32|MEM, IMM);
|
||||
}
|
||||
|
||||
put("vpmovmskb", REG32e, XMM);
|
||||
|
||||
{
|
||||
const struct Tbl {
|
||||
const char *name;
|
||||
bool supportYMM;
|
||||
} tbl[] = {
|
||||
{ "vblendvpd", true },
|
||||
{ "vblendvps", true },
|
||||
{ "vpblendvb", false },
|
||||
};
|
||||
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
|
||||
const Tbl& p = tbl[i];
|
||||
put(p.name, XMM, XMM, XMM | MEM, XMM);
|
||||
put(p.name, XMM, XMM | MEM, XMM);
|
||||
if (!p.supportYMM) continue;
|
||||
put(p.name, YMM, YMM, YMM | MEM, YMM);
|
||||
put(p.name, YMM, YMM | MEM, YMM);
|
||||
}
|
||||
}
|
||||
// cvt
|
||||
{
|
||||
put("vcvtss2si", REG32e, XMM | MEM);
|
||||
put("vcvttss2si", REG32e, XMM | MEM);
|
||||
put("vcvtsd2si", REG32e, XMM | MEM);
|
||||
put("vcvttsd2si", REG32e, XMM | MEM);
|
||||
|
||||
put("vcvtsi2ss", XMM, XMM, REG32e | MEM);
|
||||
put("vcvtsi2ss", XMM, REG32e | MEM);
|
||||
|
||||
put("vcvtsi2sd", XMM, XMM, REG32e | MEM);
|
||||
put("vcvtsi2sd", XMM, REG32e | MEM);
|
||||
|
||||
put("vcvtps2pd", XMM | YMM, XMM | MEM);
|
||||
put("vcvtdq2pd", XMM | YMM, XMM | MEM);
|
||||
|
||||
put("vcvtpd2ps", XMM, XMM | YMM | MEM);
|
||||
put("vcvtpd2dq", XMM, XMM | YMM | MEM);
|
||||
put("vcvttpd2dq", XMM, XMM | YMM | MEM);
|
||||
}
|
||||
#ifdef XBYAK64
|
||||
put("vmovq", XMM, XMM | REG64 | MEM);
|
||||
put("vmovq", REG64 | MEM, XMM);
|
||||
|
||||
put("vpextrq", REG64|MEM, XMM, IMM);
|
||||
|
||||
put("vpinsrq", XMM, XMM, REG64|MEM, IMM);
|
||||
put("vpinsrq", XMM, REG64|MEM, IMM);
|
||||
|
||||
#endif
|
||||
}
|
||||
void putFMA2()
|
||||
{
|
||||
#ifndef USE_YASM
|
||||
put("vmaskmovps", XMM, XMM, MEM);
|
||||
put("vmaskmovps", YMM, YMM, MEM);
|
||||
|
||||
put("vmaskmovpd", YMM, YMM, MEM);
|
||||
put("vmaskmovpd", XMM, XMM, MEM);
|
||||
|
||||
put("vmaskmovps", MEM, XMM, XMM);
|
||||
put("vmaskmovpd", MEM, XMM, XMM);
|
||||
|
||||
put("vbroadcastf128", YMM, MEM);
|
||||
put("vbroadcastsd", YMM, MEM);
|
||||
put("vbroadcastss", XMM | YMM, MEM);
|
||||
|
||||
put("vinsertf128", YMM, YMM, XMM | MEM, IMM8);
|
||||
put("vperm2f128", YMM, YMM, YMM | MEM, IMM8);
|
||||
#else
|
||||
put("vextractf128", XMM | MEM, YMM, IMM);
|
||||
put("vmaskmovps", MEM, YMM, YMM);
|
||||
put("vmaskmovpd", MEM, YMM, YMM);
|
||||
put("vlddqu", XMM | YMM, MEM);
|
||||
|
||||
put("vmovshdup", XMM, XMM | MEM);
|
||||
put("vmovshdup", YMM, YMM | MEM);
|
||||
put("vmovsldup", XMM, XMM | MEM);
|
||||
put("vmovsldup", YMM, YMM | MEM);
|
||||
|
||||
// QQQ:nasm is wrong
|
||||
put("vpcmpeqq", XMM, XMM | MEM);
|
||||
put("vpcmpeqq", XMM, XMM, XMM | MEM);
|
||||
put("vpcmpgtq", XMM, XMM | MEM);
|
||||
put("vpcmpgtq", XMM, XMM, XMM | MEM);
|
||||
|
||||
put("vpextrw", MEM, XMM, IMM); // nasm iw wrong?
|
||||
#endif
|
||||
}
|
||||
public:
|
||||
Test(bool isXbyak)
|
||||
: isXbyak_(isXbyak)
|
||||
|
@ -1178,6 +1789,22 @@ public:
|
|||
}
|
||||
void put()
|
||||
{
|
||||
#ifdef USE_AVX
|
||||
#ifndef USE_YASM
|
||||
putAVX1();
|
||||
putAVX2();
|
||||
putAVX_X_X_XM_omit();
|
||||
putAVX_X_X_XM_IMM();
|
||||
putAVX_X_XM_IMM();
|
||||
putAVX_X_X_XM();
|
||||
putAVX_X_XM();
|
||||
putAVX_M_X();
|
||||
putAVX_X_X_IMM_omit();
|
||||
putFMA();
|
||||
#endif
|
||||
putFMA2();
|
||||
#else
|
||||
putJmp();
|
||||
#ifndef USE_YASM
|
||||
putSIMPLE();
|
||||
putReg1();
|
||||
|
@ -1219,6 +1846,7 @@ public:
|
|||
separateFunc();
|
||||
putSSE4_2();
|
||||
putMov64();
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
};
|
||||
|
|
7460
test/nm.cpp
7460
test/nm.cpp
File diff suppressed because it is too large
Load diff
|
@ -25,7 +25,7 @@ cl address.cpp %OPT% %OPT2%
|
|||
address %1% > a.asm
|
||||
echo nasm -f %OPT3% -l a.lst a.asm
|
||||
nasm -f %OPT3% -l a.lst a.asm
|
||||
awk "{print $3}" < a.lst > ok.lst
|
||||
awk "!/warning:/ {print $3}" < a.lst > ok.lst
|
||||
echo address %1% jit > nm.cpp
|
||||
address %1% jit > nm.cpp
|
||||
echo cl -I../ -DXBYAK_TEST nm_frame.cpp %OPT% %OPT2%
|
||||
|
|
|
@ -1,5 +1,7 @@
|
|||
#!/bin/tcsh
|
||||
|
||||
set FILTER=cat
|
||||
|
||||
if ($1 == "Y") then
|
||||
echo "yasm(32bit)"
|
||||
set EXE=yasm
|
||||
|
|
|
@ -7,3 +7,5 @@ echo *** nasm(64bit) ***
|
|||
call test_nm 64
|
||||
echo *** yasm(64bit) ***
|
||||
call test_nm Y64
|
||||
|
||||
call test_avx_all
|
||||
|
|
10
xbyak.sln
10
xbyak.sln
|
@ -13,6 +13,8 @@ Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "toyvm", "sample\toyvm.vcpro
|
|||
EndProject
|
||||
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "test_util", "sample\test_util.vcproj", "{CFC9B272-FDA1-4C87-B4EF-CDCA9B57F4DD}"
|
||||
EndProject
|
||||
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "calc2", "sample\calc2.vcproj", "{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}"
|
||||
EndProject
|
||||
Global
|
||||
GlobalSection(SolutionConfigurationPlatforms) = preSolution
|
||||
Debug|Win32 = Debug|Win32
|
||||
|
@ -69,6 +71,14 @@ Global
|
|||
{CFC9B272-FDA1-4C87-B4EF-CDCA9B57F4DD}.Release|Win32.Build.0 = Release|Win32
|
||||
{CFC9B272-FDA1-4C87-B4EF-CDCA9B57F4DD}.Release|x64.ActiveCfg = Release|x64
|
||||
{CFC9B272-FDA1-4C87-B4EF-CDCA9B57F4DD}.Release|x64.Build.0 = Release|x64
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Debug|Win32.ActiveCfg = Debug|Win32
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Debug|Win32.Build.0 = Debug|Win32
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Debug|x64.ActiveCfg = Debug|x64
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Debug|x64.Build.0 = Debug|x64
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Release|Win32.ActiveCfg = Release|Win32
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Release|Win32.Build.0 = Release|Win32
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Release|x64.ActiveCfg = Release|x64
|
||||
{8EC11C7F-1B5C-4787-8940-B9B3AAF1D204}.Release|x64.Build.0 = Release|x64
|
||||
EndGlobalSection
|
||||
GlobalSection(SolutionProperties) = preSolution
|
||||
HideSolutionNode = FALSE
|
||||
|
|
251
xbyak/xbyak.h
251
xbyak/xbyak.h
|
@ -4,9 +4,9 @@
|
|||
@file xbyak.h
|
||||
@brief Xbyak ; JIT assembler for x86(IA32)/x64 by C++
|
||||
@author herumi
|
||||
@version $Revision: 1.196 $
|
||||
@version $Revision: 1.238 $
|
||||
@url http://homepage1.nifty.com/herumi/soft/xbyak.html
|
||||
@date $Date: 2010/07/07 01:00:04 $
|
||||
@date $Date: 2011/02/04 03:46:09 $
|
||||
@note modified new BSD license
|
||||
http://www.opensource.org/licenses/bsd-license.php
|
||||
*/
|
||||
|
@ -15,6 +15,7 @@
|
|||
#include <assert.h>
|
||||
#include <map>
|
||||
#include <string>
|
||||
#include <algorithm>
|
||||
#ifdef _WIN32
|
||||
#include <windows.h>
|
||||
#elif defined(__GNUC__)
|
||||
|
@ -55,7 +56,7 @@ namespace Xbyak {
|
|||
|
||||
enum {
|
||||
DEFAULT_MAX_CODE_SIZE = 4096,
|
||||
VERSION = 0x2290, /* 0xABCD = A.BC(D) */
|
||||
VERSION = 0x2990, /* 0xABCD = A.BC(D) */
|
||||
};
|
||||
|
||||
#ifndef MIE_INTEGER_TYPE_DEFINED
|
||||
|
@ -173,7 +174,8 @@ public:
|
|||
REG = 1 << 3,
|
||||
MMX = 1 << 4,
|
||||
XMM = 1 << 5,
|
||||
FPU = 1 << 6
|
||||
FPU = 1 << 6,
|
||||
YMM = 1 << 7
|
||||
};
|
||||
enum Code {
|
||||
#ifdef XBYAK64
|
||||
|
@ -201,11 +203,11 @@ public:
|
|||
bool isNone() const { return kind_ == 0; }
|
||||
bool isMMX() const { return is(MMX); }
|
||||
bool isXMM() const { return is(XMM); }
|
||||
bool isYMM() const { return is(YMM); }
|
||||
bool isREG(int bit = 0) const { return is(REG, bit); }
|
||||
bool isMEM(int bit = 0) const { return is(MEM, bit); }
|
||||
bool isFPU() const { return is(FPU); }
|
||||
bool isExt8bit() const { return ext8bit_ != 0; }
|
||||
Operand changeBit(int bit) const { return Operand(idx_, static_cast<Kind>(kind_), bit, ext8bit_); }
|
||||
// any bit is accetable if bit == 0
|
||||
bool is(int kind, uint32 bit = 0) const
|
||||
{
|
||||
|
@ -227,12 +229,15 @@ public:
|
|||
{ "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" },
|
||||
};
|
||||
return tbl[bit_ == 8 ? 0 : bit_ == 16 ? 1 : bit_ == 32 ? 2 : 3][idx_];
|
||||
} else if (isMMX()) {
|
||||
static const char tbl[8][4] = { "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" };
|
||||
} else if (isYMM()) {
|
||||
static const char tbl[16][5] = { "ym0", "ym1", "ym2", "ym3", "ym4", "ym5", "ym6", "ym7", "ym8", "ym9", "ym10", "ym11", "ym12", "ym13", "ym14", "ym15" };
|
||||
return tbl[idx_];
|
||||
} else if (isXMM()) {
|
||||
static const char tbl[16][5] = { "xm0", "xm1", "xm2", "xm3", "xm4", "xm5", "xm6", "xm7", "xm8", "xm9", "xm10", "xm11", "xm12", "xm13", "xm14", "xm15" };
|
||||
return tbl[idx_];
|
||||
} else if (isMMX()) {
|
||||
static const char tbl[8][4] = { "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" };
|
||||
return tbl[idx_];
|
||||
} else if (isFPU()) {
|
||||
static const char tbl[8][4] = { "st0", "st1", "st2", "st3", "st4", "st5", "st6", "st7" };
|
||||
return tbl[idx_];
|
||||
|
@ -243,14 +248,15 @@ public:
|
|||
|
||||
class Reg : public Operand {
|
||||
void operator=(const Reg&);
|
||||
bool hasRex() const { return isExt8bit() | isREG(64) | isExtIdx(); }
|
||||
public:
|
||||
Reg() { }
|
||||
Reg(int idx, Kind kind, int bit = 0, int ext8bit = 0) : Operand(idx, kind, bit, ext8bit) { }
|
||||
// reg = this
|
||||
uint8 getRex(const Reg& index = Reg(), const Reg& base = Reg()) const
|
||||
Reg changeBit(int bit) const { return Reg(getIdx(), getKind(), bit, isExt8bit()); }
|
||||
bool isExtIdx() const { return getIdx() > 7; }
|
||||
uint8 getRex(const Reg& base = Reg()) const
|
||||
{
|
||||
if ((!isExt8bit() && !index.isExt8bit() && !base.isExt8bit()) && (getIdx() | index.getIdx() | base.getIdx()) < 8) return 0;
|
||||
return uint8(0x40 | ((getIdx() >> 3) << 2)| ((index.getIdx() >> 3) << 1) | (base.getIdx() >> 3));
|
||||
return (hasRex() || base.hasRex()) ? uint8(0x40 | ((isREG(64) | base.isREG(64)) ? 8 : 0) | (isExtIdx() ? 4 : 0)| (base.isExtIdx() ? 1 : 0)) : 0;
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -275,7 +281,13 @@ public:
|
|||
class Xmm : public Mmx {
|
||||
void operator=(const Xmm&);
|
||||
public:
|
||||
explicit Xmm(int idx) : Mmx(idx, Operand::XMM, 128) { }
|
||||
explicit Xmm(int idx, Kind kind = Operand::XMM, int bit = 128) : Mmx(idx, kind, bit) { }
|
||||
};
|
||||
|
||||
class Ymm : public Xmm {
|
||||
void operator=(const Ymm&);
|
||||
public:
|
||||
explicit Ymm(int idx) : Xmm(idx, Operand::YMM, 256) { }
|
||||
};
|
||||
|
||||
class Fpu : public Reg {
|
||||
|
@ -327,7 +339,7 @@ private:
|
|||
{
|
||||
return operator+(r, -static_cast<int>(disp));
|
||||
}
|
||||
void operator=(const Reg32e&); // don't call
|
||||
void operator=(const Reg32e&);
|
||||
public:
|
||||
explicit Reg32e(int idx, int bit)
|
||||
: Reg(idx, REG, bit)
|
||||
|
@ -407,7 +419,6 @@ public:
|
|||
, size_(0)
|
||||
{
|
||||
if (type_ == ALLOC_BUF && !protect(top_, maxSize, true)) {
|
||||
// fprintf(stderr, "can't protect (addr=%p, size=%u, canExec=%d)\n", addr, size, canExec);
|
||||
throw ERR_CANT_PROTECT;
|
||||
}
|
||||
}
|
||||
|
@ -541,11 +552,7 @@ public:
|
|||
uint64 getDisp() const { return disp_; }
|
||||
uint8 getRex() const { return rex_; }
|
||||
bool is64bitDisp() const { return is64bitDisp_; } // for moffset
|
||||
#ifdef XBYAK64
|
||||
void setRex(uint8 rex) { rex_ = rex; }
|
||||
#else
|
||||
void setRex(uint8) { }
|
||||
#endif
|
||||
};
|
||||
|
||||
class AddressFrame {
|
||||
|
@ -611,7 +618,8 @@ public:
|
|||
} else if (mod == mod10 || (mod == mod00 && r.isNone())) {
|
||||
frame.dd(r.disp_);
|
||||
}
|
||||
frame.setRex(Reg().getRex(r.index_, r));
|
||||
uint8 rex = ((r.getIdx() | r.index_.getIdx()) < 8) ? 0 : uint8(0x40 | ((r.index_.getIdx() >> 3) << 1) | (r.getIdx() >> 3));
|
||||
frame.setRex(rex);
|
||||
return frame;
|
||||
}
|
||||
};
|
||||
|
@ -785,35 +793,43 @@ private:
|
|||
{
|
||||
return op1.isREG(i32e) && (op2.isXMM() || op2.isMEM());
|
||||
}
|
||||
void if16bit(const Operand& reg1, const Operand& reg2)
|
||||
{
|
||||
// except movsx(16bit, 32/64bit)
|
||||
if ((reg1.isBit(16) && !reg2.isBit(i32e)) || (reg2.isBit(16) && !reg1.isBit(i32e))) db(0x66);
|
||||
}
|
||||
void rexAddr(const Address& addr, const Reg& reg = Reg())
|
||||
{
|
||||
#ifdef XBYAK64
|
||||
if (addr.is32bit_) db(0x67);
|
||||
#endif
|
||||
if16bit(reg, addr);
|
||||
uint32 rex = addr.getRex() | reg.getRex();
|
||||
if (reg.isREG(64)) rex |= 0x48;
|
||||
if (rex) db(rex);
|
||||
}
|
||||
void rex(const Operand& op1, const Operand& op2 = Operand())
|
||||
{
|
||||
if (op1.isMEM()) {
|
||||
rexAddr(static_cast<const Address&>(op1), static_cast<const Reg&>(op2));
|
||||
} else if (op2.isMEM()) {
|
||||
rexAddr(static_cast<const Address&>(op2), static_cast<const Reg&>(op1));
|
||||
uint8 rex = 0;
|
||||
const Operand *p1 = &op1, *p2 = &op2;
|
||||
if (p1->isMEM()) std::swap(p1, p2);
|
||||
if (p1->isMEM()) throw ERR_BAD_COMBINATION;
|
||||
if (p2->isMEM()) {
|
||||
const Address& addr = static_cast<const Address&>(*p2);
|
||||
if (BIT == 64 && addr.is32bit_) db(0x67);
|
||||
rex = addr.getRex() | static_cast<const Reg&>(*p1).getRex();
|
||||
} else {
|
||||
const Reg& reg1 = static_cast<const Reg&>(op1);
|
||||
const Reg& reg2 = static_cast<const Reg&>(op2);
|
||||
// ModRM(reg, base);
|
||||
if16bit(reg1, reg2);
|
||||
uint8 rex = reg2.getRex(Reg(), reg1);
|
||||
if (reg1.isREG(64) || reg2.isREG(64)) rex |= 0x48;
|
||||
if (rex) db(rex);
|
||||
rex = static_cast<const Reg&>(op2).getRex(static_cast<const Reg&>(op1));
|
||||
}
|
||||
// except movsx(16bit, 32/64bit)
|
||||
if ((op1.isBit(16) && !op2.isBit(i32e)) || (op2.isBit(16) && !op1.isBit(i32e))) db(0x66);
|
||||
if (rex) db(rex);
|
||||
}
|
||||
enum AVXtype {
|
||||
PP_NONE = 1 << 0,
|
||||
PP_66 = 1 << 1,
|
||||
PP_F3 = 1 << 2,
|
||||
PP_F2 = 1 << 3,
|
||||
MM_RESERVED = 1 << 4,
|
||||
MM_0F = 1 << 5,
|
||||
MM_0F38 = 1 << 6,
|
||||
MM_0F3A = 1 << 7
|
||||
};
|
||||
void vex(bool r, int idx, bool is256, int type, bool x = false, bool b = false, int w = 1)
|
||||
{
|
||||
uint32 pp = (type & PP_66) ? 1 : (type & PP_F3) ? 2 : (type & PP_F2) ? 3 : 0;
|
||||
uint32 vvvv = (((~idx) & 15) << 3) | (is256 ? 4 : 0) | pp;
|
||||
if (!b && !x && !w && (type & MM_0F)) {
|
||||
db(0xC5); db((r ? 0 : 0x80) | vvvv);
|
||||
} else {
|
||||
uint32 mmmm = (type & MM_0F) ? 1 : (type & MM_0F38) ? 2 : (type & MM_0F3A) ? 3 : 0;
|
||||
db(0xC4); db((r ? 0 : 0x80) | (x ? 0 : 0x40) | (b ? 0 : 0x20) | mmmm); db((w << 7) | vvvv);
|
||||
}
|
||||
}
|
||||
Label label_;
|
||||
|
@ -900,8 +916,7 @@ private:
|
|||
}
|
||||
void opMMX(const Mmx& mmx, const Operand& op, int code, int pref = 0x66, int imm8 = NONE, int preCode = NONE)
|
||||
{
|
||||
pref = mmx.isXMM() ? pref : NONE;
|
||||
opGen(mmx, op, code, pref, isXMMorMMX_MEM, imm8, preCode);
|
||||
opGen(mmx, op, code, mmx.isXMM() ? pref : NONE, isXMMorMMX_MEM, imm8, preCode);
|
||||
}
|
||||
void opMovXMM(const Operand& op1, const Operand& op2, int code, int pref)
|
||||
{
|
||||
|
@ -923,28 +938,14 @@ private:
|
|||
opGen(mmx, op, code, 0x66, isXMM_REG32orMEM, imm, B00111010);
|
||||
}
|
||||
}
|
||||
void opR_ModM(const Operand& op, int bit, uint8 mod, int ext, int code0, int code1 = NONE, int code2 = NONE,
|
||||
bool
|
||||
#ifdef XBYAK64
|
||||
disableRex // avoid warning
|
||||
#endif
|
||||
= false)
|
||||
void opR_ModM(const Operand& op, int bit, int ext, int code0, int code1 = NONE, int code2 = NONE, bool disableRex = false)
|
||||
{
|
||||
int opBit = op.getBit();
|
||||
if (disableRex && opBit == 64) opBit = 32;
|
||||
if (op.isREG(bit)) {
|
||||
#ifdef XBYAK64 // append for call/jmp(dirty hack)
|
||||
if (disableRex) {
|
||||
uint8 rex = Reg().getRex(Reg(), static_cast<const Reg&>(op));
|
||||
if (op.isREG(16)) db(0x66);
|
||||
if (rex) db(rex);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
rex(op);
|
||||
}
|
||||
db(code0 | (op.isBit(8) ? 0 : 1)); if (code1 != NONE) db(code1); if (code2 != NONE) db(code2);
|
||||
db(getModRM(mod, ext, op.getIdx()));
|
||||
opModR(Reg(ext, Operand::REG, opBit), static_cast<const Reg&>(op).changeBit(opBit), code0, code1, code2);
|
||||
} else if (op.isMEM()) {
|
||||
opModM(static_cast<const Address&>(op), Reg(ext, Operand::REG, op.getBit()), code0, code1, code2);
|
||||
opModM(static_cast<const Address&>(op), Reg(ext, Operand::REG, opBit), code0, code1, code2);
|
||||
} else {
|
||||
throw ERR_BAD_COMBINATION;
|
||||
}
|
||||
|
@ -952,13 +953,13 @@ private:
|
|||
void opShift(const Operand& op, int imm, int ext)
|
||||
{
|
||||
verifyMemHasSize(op);
|
||||
opR_ModM(op, 0, 3, ext, (B11000000 | ((imm == 1 ? 1 : 0) << 4)));
|
||||
opR_ModM(op, 0, ext, (B11000000 | ((imm == 1 ? 1 : 0) << 4)));
|
||||
if (imm != 1) db(imm);
|
||||
}
|
||||
void opShift(const Operand& op, const Reg8& cl, int ext)
|
||||
{
|
||||
if (cl.getIdx() != Operand::CL) throw ERR_BAD_COMBINATION;
|
||||
opR_ModM(op, 0, 3, ext, B11010010);
|
||||
opR_ModM(op, 0, ext, B11010010);
|
||||
}
|
||||
void opModRM(const Operand& op1, const Operand& op2, bool condR, bool condM, int code0, int code1 = NONE, int code2 = NONE)
|
||||
{
|
||||
|
@ -991,20 +992,19 @@ private:
|
|||
verifyMemHasSize(op);
|
||||
uint32 immBit = inner::IsInDisp8(imm) ? 8 : isInDisp16(imm) ? 16 : 32;
|
||||
if (op.getBit() < immBit) throw ERR_IMM_IS_TOO_BIG;
|
||||
if (op.isREG()) {
|
||||
if (immBit == 16 && op.isBit(32|64)) immBit = 32; /* don't use MEM16 if 32/64bit mode */
|
||||
}
|
||||
if (op.isREG(32|64) && immBit == 16) immBit = 32; /* don't use MEM16 if 32/64bit mode */
|
||||
if (op.isREG() && op.getIdx() == 0 && (op.getBit() == immBit || (op.isBit(64) && immBit == 32))) { // rax, eax, ax, al
|
||||
rex(op);
|
||||
db(code | 4 | (immBit == 8 ? 0 : 1));
|
||||
} else {
|
||||
int tmp = (op.getBit() > immBit && 32 > immBit) ? 2 : 0;
|
||||
opR_ModM(op, 0, 3, ext, B10000000 | tmp);
|
||||
int tmp = immBit < (std::min)(op.getBit(), 32U) ? 2 : 0;
|
||||
opR_ModM(op, 0, ext, B10000000 | tmp);
|
||||
}
|
||||
db(imm, immBit / 8);
|
||||
}
|
||||
void opIncDec(const Operand& op, int code, int ext)
|
||||
{
|
||||
verifyMemHasSize(op);
|
||||
#ifndef XBYAK64
|
||||
if (op.isREG() && !op.isBit(8)) {
|
||||
rex(op); db(code | op.getIdx());
|
||||
|
@ -1014,21 +1014,15 @@ private:
|
|||
code = B11111110;
|
||||
if (op.isREG()) {
|
||||
opModR(Reg(ext, Operand::REG, op.getBit()), static_cast<const Reg&>(op), code);
|
||||
} else if (op.isMEM() && op.getBit() > 0) {
|
||||
opModM(static_cast<const Address&>(op), Reg(ext, Operand::REG, op.getBit()), code);
|
||||
} else {
|
||||
throw ERR_BAD_COMBINATION;
|
||||
opModM(static_cast<const Address&>(op), Reg(ext, Operand::REG, op.getBit()), code);
|
||||
}
|
||||
}
|
||||
void opPushPop(const Operand& op, int code, int ext, int alt)
|
||||
{
|
||||
if (op.isREG()) {
|
||||
#ifdef XBYAK64
|
||||
if (op.isBit(16)) db(0x66);
|
||||
if (static_cast<const Reg&>(op).getIdx() >= 8) db(0x41);
|
||||
#else
|
||||
rex(op);
|
||||
#endif
|
||||
db(alt | (op.getIdx() & 7));
|
||||
} else if (op.isMEM()) {
|
||||
opModM(static_cast<const Address&>(op), Reg(ext, Operand::REG, op.getBit()), code);
|
||||
|
@ -1077,7 +1071,9 @@ public:
|
|||
using CodeArray::db;
|
||||
const Mmx mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7;
|
||||
const Xmm xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7;
|
||||
const Ymm ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7;
|
||||
const Xmm &xm0, &xm1, &xm2, &xm3, &xm4, &xm5, &xm6, &xm7;
|
||||
const Ymm &ym0, &ym1, &ym2, &ym3, &ym4, &ym5, &ym6, &ym7;
|
||||
const Reg32 eax, ecx, edx, ebx, esp, ebp, esi, edi;
|
||||
const Reg16 ax, cx, dx, bx, sp, bp, si, di;
|
||||
const Reg8 al, cl, dl, bl, ah, ch, dh, bh;
|
||||
|
@ -1090,7 +1086,9 @@ public:
|
|||
const Reg8 r8b, r9b, r10b, r11b, r12b, r13b, r14b, r15b;
|
||||
const Reg8 spl, bpl, sil, dil;
|
||||
const Xmm xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15;
|
||||
const Xmm &xm8, &xm9, &xm10, &xm11, &xm12, &xm13, &xm14, &xm15;
|
||||
const Ymm ymm8, ymm9, ymm10, ymm11, ymm12, ymm13, ymm14, ymm15;
|
||||
const Xmm &xm8, &xm9, &xm10, &xm11, &xm12, &xm13, &xm14, &xm15; // for my convenience
|
||||
const Ymm &ym8, &ym9, &ym10, &ym11, &ym12, &ym13, &ym14, &ym15;
|
||||
const RegRip rip;
|
||||
#endif
|
||||
|
||||
|
@ -1110,11 +1108,11 @@ public:
|
|||
}
|
||||
void jmp(const Operand& op)
|
||||
{
|
||||
opR_ModM(op, BIT, 3, 4, 0xFF, NONE, NONE, true);
|
||||
opR_ModM(op, BIT, 4, 0xFF, NONE, NONE, true);
|
||||
}
|
||||
void call(const Operand& op)
|
||||
{
|
||||
opR_ModM(op, 16 | i32e, 3, 2, 0xFF, NONE, NONE, true);
|
||||
opR_ModM(op, 16 | i32e, 2, 0xFF, NONE, NONE, true);
|
||||
}
|
||||
// (REG|MEM, REG)
|
||||
void test(const Operand& op, const Reg& reg)
|
||||
|
@ -1129,10 +1127,9 @@ public:
|
|||
rex(op);
|
||||
db(B10101000 | (op.isBit(8) ? 0 : 1));
|
||||
} else {
|
||||
opR_ModM(op, 0, 3, 0, B11110110);
|
||||
opR_ModM(op, 0, 0, B11110110);
|
||||
}
|
||||
int size = op.getBit() / 8; if (size > 4) size = 4;
|
||||
db(imm, size);
|
||||
db(imm, (std::min)(op.getBit() / 8, 4U));
|
||||
}
|
||||
void ret(int imm = 0)
|
||||
{
|
||||
|
@ -1338,6 +1335,16 @@ public:
|
|||
if (mmx.isXMM()) db(0x66);
|
||||
opModR(mmx, reg, 0x0F, B01101110);
|
||||
}
|
||||
void pextrq(const Operand& op, const Xmm& xmm, uint8 imm)
|
||||
{
|
||||
if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION;
|
||||
opGen(Reg64(xmm.getIdx()), op, 0x16, 0x66, 0, imm, B00111010); // force to 64bit
|
||||
}
|
||||
void pinsrq(const Xmm& xmm, const Operand& op, uint8 imm)
|
||||
{
|
||||
if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION;
|
||||
opGen(Reg64(xmm.getIdx()), op, 0x22, 0x66, 0, imm, B00111010); // force to 64bit
|
||||
}
|
||||
#endif
|
||||
// MMX2 : pextrw : reg, mmx/xmm, imm
|
||||
// SSE4 : pextrw, pextrb, pextrd, extractps : reg/mem, mmx/xmm, imm
|
||||
|
@ -1382,7 +1389,7 @@ public:
|
|||
bool is16bit = reg.isREG(16) && (op.isREG(16) || op.isMEM());
|
||||
if (!is16bit && !(reg.isREG(i32e) && (op.isREG(i32e) || op.isMEM()))) throw ERR_BAD_COMBINATION;
|
||||
if (is16bit) db(0x66);
|
||||
db(0xF3); opModRM(Reg(reg.getIdx(), Operand::REG, i32e == 32 ? 32 : reg.getBit()), op, op.isREG(), true, 0x0F, 0xB8);
|
||||
db(0xF3); opModRM(reg.changeBit(i32e == 32 ? 32 : reg.getBit()), op, op.isREG(), true, 0x0F, 0xB8);
|
||||
}
|
||||
void crc32(const Reg32e& reg, const Operand& op)
|
||||
{
|
||||
|
@ -1390,13 +1397,81 @@ public:
|
|||
db(0xF2);
|
||||
opModRM(reg, op, op.isREG(), op.isMEM(), 0x0F, 0x38, 0xF0 | (op.isBit(8) ? 0 : 1));
|
||||
}
|
||||
public:
|
||||
void vextractps(const Operand& op, const Xmm& xmm, uint8 imm)
|
||||
{
|
||||
if (!(op.isREG(32) || op.isMEM()) || xmm.isYMM()) throw ERR_BAD_COMBINATION;
|
||||
opAVX_X_XM_IMM(xmm, cvtReg(op, op.isREG(), Operand::XMM), MM_0F3A | PP_66, 0x17, false, 0, imm);
|
||||
}
|
||||
// support (x, x, x/m), (y, y, y/m)
|
||||
void opAVX_X_X_XM(const Xmm& xm1, const Operand& op1, const Operand& op2, int type, int code0, bool supportYMM, int w = -1)
|
||||
{
|
||||
const Xmm *xm2;
|
||||
const Operand *op;
|
||||
if (op2.isNone()) {
|
||||
xm2 = &xm1;
|
||||
op = &op1;
|
||||
} else {
|
||||
if (!(op1.isXMM() || (supportYMM && op1.isYMM()))) throw ERR_BAD_COMBINATION;
|
||||
xm2 = static_cast<const Xmm*>(&op1);
|
||||
op = &op2;
|
||||
}
|
||||
// (xm1, xm2, op)
|
||||
if (!((xm1.isXMM() && xm2->isXMM()) || (supportYMM && xm1.isYMM() && xm2->isYMM()))) throw ERR_BAD_COMBINATION;
|
||||
bool x, b;
|
||||
if (op->isMEM()) {
|
||||
const Address& addr = *static_cast<const Address*>(op);
|
||||
uint8 rex = addr.getRex();
|
||||
x = (rex & 2) != 0;
|
||||
b = (rex & 1) != 0;
|
||||
if (BIT == 64 && addr.is32bit_) db(0x67);
|
||||
if (BIT == 64 && w == -1) w = (rex & 4) ? 1 : 0;
|
||||
} else {
|
||||
x = false;
|
||||
b = static_cast<const Reg*>(op)->isExtIdx();
|
||||
}
|
||||
if (w == -1) w = 0;
|
||||
vex(xm1.isExtIdx(), xm2->getIdx(), xm1.isYMM(), type, x, b, w);
|
||||
db(code0);
|
||||
if (op->isMEM()) {
|
||||
const Address& addr = *static_cast<const Address*>(op);
|
||||
addr.updateRegField(static_cast<uint8>(xm1.getIdx()));
|
||||
db(addr.getCode(), static_cast<int>(addr.getSize()));
|
||||
} else {
|
||||
db(getModRM(3, xm1.getIdx(), op->getIdx()));
|
||||
}
|
||||
}
|
||||
// if cvt then return pointer to Xmm(idx) (or Ymm(idx)), otherwise return op
|
||||
const Operand& cvtReg(const Operand& op, bool cvt, Operand::Kind kind) const
|
||||
{
|
||||
if (!cvt) return op;
|
||||
static const Xmm* xmTbl[] = {
|
||||
&xm0, &xm1, &xm2, &xm3, &xm4, &xm5, &xm6, &xm7,
|
||||
#ifdef XBYAK64
|
||||
&xm8, &xm9, &xm10, &xm11, &xm12, &xm13, &xm14, &xm15
|
||||
#endif
|
||||
};
|
||||
static const Ymm* ymTbl[] = {
|
||||
&ym0, &ym1, &ym2, &ym3, &ym4, &ym5, &ym6, &ym7,
|
||||
#ifdef XBYAK64
|
||||
&ym8, &ym9, &ym10, &ym11, &ym12, &ym13, &ym14, &ym15
|
||||
#endif
|
||||
};
|
||||
return (kind == Operand::XMM) ? *xmTbl[op.getIdx()] : *ymTbl[op.getIdx()];
|
||||
}
|
||||
// support (x, x/m, imm), (y, y/m, imm)
|
||||
void opAVX_X_XM_IMM(const Xmm& xmm, const Operand& op, int type, int code, bool supportYMM, int w = -1, int imm = NONE)
|
||||
{
|
||||
opAVX_X_X_XM(xmm, xmm.isXMM() ? xm0 : ym0, op, type, code, supportYMM, w); if (imm != NONE) db((uint8)imm);
|
||||
}
|
||||
enum { NONE = 256 };
|
||||
public:
|
||||
CodeGenerator(size_t maxSize = DEFAULT_MAX_CODE_SIZE, void *userPtr = 0)
|
||||
: CodeArray(maxSize, userPtr)
|
||||
, mm0(0), mm1(1), mm2(2), mm3(3), mm4(4), mm5(5), mm6(6), mm7(7)
|
||||
, xmm0(0), xmm1(1), xmm2(2), xmm3(3), xmm4(4), xmm5(5), xmm6(6), xmm7(7)
|
||||
, ymm0(0), ymm1(1), ymm2(2), ymm3(3), ymm4(4), ymm5(5), ymm6(6), ymm7(7)
|
||||
, xm0(xmm0), xm1(xmm1), xm2(xmm2), xm3(xmm3), xm4(xmm4), xm5(xmm5), xm6(xmm6), xm7(xmm7) // for my convenience
|
||||
, ym0(ymm0), ym1(ymm1), ym2(ymm2), ym3(ymm3), ym4(ymm4), ym5(ymm5), ym6(ymm6), ym7(ymm7) // for my convenience
|
||||
, eax(Operand::EAX), ecx(Operand::ECX), edx(Operand::EDX), ebx(Operand::EBX), esp(Operand::ESP), ebp(Operand::EBP), esi(Operand::ESI), edi(Operand::EDI)
|
||||
, ax(Operand::EAX), cx(Operand::ECX), dx(Operand::EDX), bx(Operand::EBX), sp(Operand::ESP), bp(Operand::EBP), si(Operand::ESI), di(Operand::EDI)
|
||||
, al(Operand::AL), cl(Operand::CL), dl(Operand::DL), bl(Operand::BL), ah(Operand::AH), ch(Operand::CH), dh(Operand::DH), bh(Operand::BH)
|
||||
|
@ -1409,7 +1484,9 @@ public:
|
|||
, r8b(Operand::R8B), r9b(Operand::R9B), r10b(Operand::R10B), r11b(Operand::R11B), r12b(Operand::R12B), r13b(Operand::R13B), r14b(Operand::R14B), r15b(Operand::R15B)
|
||||
, spl(Operand::SPL, 1), bpl(Operand::BPL, 1), sil(Operand::SIL, 1), dil(Operand::DIL, 1)
|
||||
, xmm8(8), xmm9(9), xmm10(10), xmm11(11), xmm12(12), xmm13(13), xmm14(14), xmm15(15)
|
||||
, ymm8(8), ymm9(9), ymm10(10), ymm11(11), ymm12(12), ymm13(13), ymm14(14), ymm15(15)
|
||||
, xm8(xmm8), xm9(xmm9), xm10(xmm10), xm11(xmm11), xm12(xmm12), xm13(xmm13), xm14(xmm14), xm15(xmm15) // for my convenience
|
||||
, ym8(ymm8), ym9(ymm9), ym10(ymm10), ym11(ymm11), ym12(ymm12), ym13(ymm13), ym14(ymm14), ym15(ymm15) // for my convenience
|
||||
, rip()
|
||||
#endif
|
||||
{
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
const char *getVersionString() const { return "2.29"; }
|
||||
const char *getVersionString() const { return "2.99"; }
|
||||
void packssdw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x6B); }
|
||||
void packsswb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x63); }
|
||||
void packuswb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x67); }
|
||||
|
@ -184,94 +184,94 @@ void movhpd(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, 0x16, 0
|
|||
void movlpd(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, 0x12, 0x66); }
|
||||
void cmovo(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 0); }
|
||||
void jo(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x70, 0x80, 0x0F); }
|
||||
void seto(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 0); }
|
||||
void seto(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 0); }
|
||||
void cmovno(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 1); }
|
||||
void jno(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x71, 0x81, 0x0F); }
|
||||
void setno(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 1); }
|
||||
void setno(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 1); }
|
||||
void cmovb(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 2); }
|
||||
void jb(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }
|
||||
void setb(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 2); }
|
||||
void setb(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 2); }
|
||||
void cmovc(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 2); }
|
||||
void jc(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }
|
||||
void setc(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 2); }
|
||||
void setc(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 2); }
|
||||
void cmovnae(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 2); }
|
||||
void jnae(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }
|
||||
void setnae(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 2); }
|
||||
void setnae(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 2); }
|
||||
void cmovnb(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 3); }
|
||||
void jnb(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }
|
||||
void setnb(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 3); }
|
||||
void setnb(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 3); }
|
||||
void cmovae(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 3); }
|
||||
void jae(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }
|
||||
void setae(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 3); }
|
||||
void setae(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 3); }
|
||||
void cmovnc(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 3); }
|
||||
void jnc(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }
|
||||
void setnc(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 3); }
|
||||
void setnc(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 3); }
|
||||
void cmove(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 4); }
|
||||
void je(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x74, 0x84, 0x0F); }
|
||||
void sete(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 4); }
|
||||
void sete(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 4); }
|
||||
void cmovz(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 4); }
|
||||
void jz(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x74, 0x84, 0x0F); }
|
||||
void setz(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 4); }
|
||||
void setz(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 4); }
|
||||
void cmovne(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 5); }
|
||||
void jne(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x75, 0x85, 0x0F); }
|
||||
void setne(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 5); }
|
||||
void setne(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 5); }
|
||||
void cmovnz(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 5); }
|
||||
void jnz(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x75, 0x85, 0x0F); }
|
||||
void setnz(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 5); }
|
||||
void setnz(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 5); }
|
||||
void cmovbe(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 6); }
|
||||
void jbe(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x76, 0x86, 0x0F); }
|
||||
void setbe(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 6); }
|
||||
void setbe(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 6); }
|
||||
void cmovna(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 6); }
|
||||
void jna(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x76, 0x86, 0x0F); }
|
||||
void setna(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 6); }
|
||||
void setna(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 6); }
|
||||
void cmovnbe(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 7); }
|
||||
void jnbe(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x77, 0x87, 0x0F); }
|
||||
void setnbe(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 7); }
|
||||
void setnbe(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 7); }
|
||||
void cmova(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 7); }
|
||||
void ja(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x77, 0x87, 0x0F); }
|
||||
void seta(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 7); }
|
||||
void seta(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 7); }
|
||||
void cmovs(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 8); }
|
||||
void js(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x78, 0x88, 0x0F); }
|
||||
void sets(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 8); }
|
||||
void sets(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 8); }
|
||||
void cmovns(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 9); }
|
||||
void jns(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x79, 0x89, 0x0F); }
|
||||
void setns(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 9); }
|
||||
void setns(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 9); }
|
||||
void cmovp(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 10); }
|
||||
void jp(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7A, 0x8A, 0x0F); }
|
||||
void setp(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 10); }
|
||||
void setp(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 10); }
|
||||
void cmovpe(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 10); }
|
||||
void jpe(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7A, 0x8A, 0x0F); }
|
||||
void setpe(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 10); }
|
||||
void setpe(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 10); }
|
||||
void cmovnp(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 11); }
|
||||
void jnp(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7B, 0x8B, 0x0F); }
|
||||
void setnp(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 11); }
|
||||
void setnp(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 11); }
|
||||
void cmovpo(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 11); }
|
||||
void jpo(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7B, 0x8B, 0x0F); }
|
||||
void setpo(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 11); }
|
||||
void setpo(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 11); }
|
||||
void cmovl(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 12); }
|
||||
void jl(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7C, 0x8C, 0x0F); }
|
||||
void setl(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 12); }
|
||||
void setl(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 12); }
|
||||
void cmovnge(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 12); }
|
||||
void jnge(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7C, 0x8C, 0x0F); }
|
||||
void setnge(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 12); }
|
||||
void setnge(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 12); }
|
||||
void cmovnl(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 13); }
|
||||
void jnl(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7D, 0x8D, 0x0F); }
|
||||
void setnl(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 13); }
|
||||
void setnl(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 13); }
|
||||
void cmovge(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 13); }
|
||||
void jge(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7D, 0x8D, 0x0F); }
|
||||
void setge(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 13); }
|
||||
void setge(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 13); }
|
||||
void cmovle(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 14); }
|
||||
void jle(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7E, 0x8E, 0x0F); }
|
||||
void setle(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 14); }
|
||||
void setle(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 14); }
|
||||
void cmovng(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 14); }
|
||||
void jng(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7E, 0x8E, 0x0F); }
|
||||
void setng(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 14); }
|
||||
void setng(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 14); }
|
||||
void cmovnle(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 15); }
|
||||
void jnle(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7F, 0x8F, 0x0F); }
|
||||
void setnle(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 15); }
|
||||
void setnle(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 15); }
|
||||
void cmovg(const Reg32e& reg, const Operand& op) { opModRM(reg, op, op.isREG(i32e), op.isMEM(), 0x0F, B01000000 | 15); }
|
||||
void jg(const char *label, LabelType type = T_AUTO) { opJmp(label, type, 0x7F, 0x8F, 0x0F); }
|
||||
void setg(const Operand& op) { opR_ModM(op, 8, 3, 0, 0x0F, B10010000 | 15); }
|
||||
void setg(const Operand& op) { opR_ModM(op, 8, 0, 0x0F, B10010000 | 15); }
|
||||
#ifdef XBYAK64
|
||||
void cdqe() { db(0x48); db(0x98); }
|
||||
#else
|
||||
|
@ -314,12 +314,16 @@ void mwait() { db(0x0F); db(0x01); db(0xC9); }
|
|||
void rdmsr() { db(0x0F); db(0x32); }
|
||||
void rdpmc() { db(0x0F); db(0x33); }
|
||||
void rdtsc() { db(0x0F); db(0x31); }
|
||||
void rdtscp() { db(0x0F); db(0x01); db(0xF9); }
|
||||
void wait() { db(0x9B); }
|
||||
void wbinvd() { db(0x0F); db(0x09); }
|
||||
void wrmsr() { db(0x0F); db(0x30); }
|
||||
void xlatb() { db(0xD7); }
|
||||
void popf() { db(0x9D); }
|
||||
void pushf() { db(0x9C); }
|
||||
void vzeroall() { db(0xC5); db(0xFC); db(0x77); }
|
||||
void vzeroupper() { db(0xC5); db(0xF8); db(0x77); }
|
||||
void xgetbv() { db(0x0F); db(0x01); db(0xD0); }
|
||||
void f2xm1() { db(0xD9); db(0xF0); }
|
||||
void fabs() { db(0xD9); db(0xE1); }
|
||||
void faddp() { db(0xDE); db(0xC1); }
|
||||
|
@ -379,12 +383,12 @@ void xor(const Operand& op1, const Operand& op2) { opRM_RM(op1, op2, 0x30); }
|
|||
void xor(const Operand& op, uint32 imm) { opRM_I(op, imm, 0x30, 6); }
|
||||
void dec(const Operand& op) { opIncDec(op, 0x48, 1); }
|
||||
void inc(const Operand& op) { opIncDec(op, 0x40, 0); }
|
||||
void div(const Operand& op) { opR_ModM(op, 0, 3, 6, 0xF6); }
|
||||
void idiv(const Operand& op) { opR_ModM(op, 0, 3, 7, 0xF6); }
|
||||
void imul(const Operand& op) { opR_ModM(op, 0, 3, 5, 0xF6); }
|
||||
void mul(const Operand& op) { opR_ModM(op, 0, 3, 4, 0xF6); }
|
||||
void neg(const Operand& op) { opR_ModM(op, 0, 3, 3, 0xF6); }
|
||||
void not(const Operand& op) { opR_ModM(op, 0, 3, 2, 0xF6); }
|
||||
void div(const Operand& op) { opR_ModM(op, 0, 6, 0xF6); }
|
||||
void idiv(const Operand& op) { opR_ModM(op, 0, 7, 0xF6); }
|
||||
void imul(const Operand& op) { opR_ModM(op, 0, 5, 0xF6); }
|
||||
void mul(const Operand& op) { opR_ModM(op, 0, 4, 0xF6); }
|
||||
void neg(const Operand& op) { opR_ModM(op, 0, 3, 0xF6); }
|
||||
void not(const Operand& op) { opR_ModM(op, 0, 2, 0xF6); }
|
||||
void rcl(const Operand& op, int imm) { opShift(op, imm, 2); }
|
||||
void rcl(const Operand& op, const Reg8& cl) { opShift(op, cl, 2); }
|
||||
void rcr(const Operand& op, int imm) { opShift(op, imm, 3); }
|
||||
|
@ -407,52 +411,57 @@ void shrd(const Operand& op, const Reg& reg, uint8 imm) { opShxd(op, reg, imm, 0
|
|||
void shrd(const Operand& op, const Reg& reg, const Reg8& cl) { opShxd(op, reg, 0, 0xAC, &cl); }
|
||||
void bsf(const Reg®, const Operand& op) { opModRM(reg, op, op.isREG(16 | i32e), op.isMEM(), 0x0F, 0xBC); }
|
||||
void bsr(const Reg®, const Operand& op) { opModRM(reg, op, op.isREG(16 | i32e), op.isMEM(), 0x0F, 0xBD); }
|
||||
void pshufb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x00, 0x66, 256, 0x38); }
|
||||
void phaddw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x01, 0x66, 256, 0x38); }
|
||||
void phaddd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x02, 0x66, 256, 0x38); }
|
||||
void phaddsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x03, 0x66, 256, 0x38); }
|
||||
void pmaddubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x04, 0x66, 256, 0x38); }
|
||||
void phsubw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x05, 0x66, 256, 0x38); }
|
||||
void phsubd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x06, 0x66, 256, 0x38); }
|
||||
void phsubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x07, 0x66, 256, 0x38); }
|
||||
void psignb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x08, 0x66, 256, 0x38); }
|
||||
void psignw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x09, 0x66, 256, 0x38); }
|
||||
void psignd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0A, 0x66, 256, 0x38); }
|
||||
void pmulhrsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0B, 0x66, 256, 0x38); }
|
||||
void pabsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1C, 0x66, 256, 0x38); }
|
||||
void pabsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1D, 0x66, 256, 0x38); }
|
||||
void pabsd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1E, 0x66, 256, 0x38); }
|
||||
void pshufb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x00, 0x66, NONE, 0x38); }
|
||||
void phaddw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x01, 0x66, NONE, 0x38); }
|
||||
void phaddd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x02, 0x66, NONE, 0x38); }
|
||||
void phaddsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x03, 0x66, NONE, 0x38); }
|
||||
void pmaddubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x04, 0x66, NONE, 0x38); }
|
||||
void phsubw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x05, 0x66, NONE, 0x38); }
|
||||
void phsubd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x06, 0x66, NONE, 0x38); }
|
||||
void phsubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x07, 0x66, NONE, 0x38); }
|
||||
void psignb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x08, 0x66, NONE, 0x38); }
|
||||
void psignw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x09, 0x66, NONE, 0x38); }
|
||||
void psignd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0A, 0x66, NONE, 0x38); }
|
||||
void pmulhrsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0B, 0x66, NONE, 0x38); }
|
||||
void pabsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1C, 0x66, NONE, 0x38); }
|
||||
void pabsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1D, 0x66, NONE, 0x38); }
|
||||
void pabsd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1E, 0x66, NONE, 0x38); }
|
||||
void palignr(const Mmx& mmx, const Operand& op, int imm) { opMMX(mmx, op, 0x0f, 0x66, static_cast<uint8>(imm), 0x3a); }
|
||||
void blendvpd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x15, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void blendvps(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x14, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void packusdw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x2B, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pblendvb(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x10, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pcmpeqq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x29, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void ptest(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x17, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovsxbw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x20, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovsxbd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x21, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovsxbq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x22, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovsxwd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x23, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovsxwq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x24, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovsxdq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x25, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovzxbw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x30, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovzxbd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x31, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovzxbq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x32, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovzxwd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x33, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovzxwq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x34, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmovzxdq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x35, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pminsb(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x38, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pminsd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x39, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pminuw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3A, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pminud(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3B, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmaxsb(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3C, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmaxsd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3D, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmaxuw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3E, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmaxud(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3F, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmuldq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x28, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pmulld(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x40, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void phminposuw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x41, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void pcmpgtq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x37, 0x66, isXMM_XMMorMEM, 256, 0x38); }
|
||||
void blendvpd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x15, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void blendvps(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x14, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void packusdw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x2B, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pblendvb(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x10, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pcmpeqq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x29, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void ptest(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x17, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovsxbw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x20, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovsxbd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x21, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovsxbq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x22, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovsxwd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x23, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovsxwq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x24, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovsxdq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x25, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovzxbw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x30, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovzxbd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x31, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovzxbq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x32, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovzxwd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x33, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovzxwq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x34, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmovzxdq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x35, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pminsb(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x38, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pminsd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x39, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pminuw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3A, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pminud(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3B, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmaxsb(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3C, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmaxsd(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3D, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmaxuw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3E, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmaxud(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x3F, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmuldq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x28, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pmulld(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x40, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void phminposuw(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x41, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void pcmpgtq(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0x37, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void aesdec(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0xDE, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void aesdeclast(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0xDF, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void aesenc(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0xDC, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void aesenclast(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0xDD, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void aesimc(const Xmm& xmm, const Operand& op) { opGen(xmm, op, 0xDB, 0x66, isXMM_XMMorMEM, NONE, 0x38); }
|
||||
void blendpd(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x0D, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
void blendps(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x0C, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
void dppd(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x41, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
|
@ -467,6 +476,8 @@ void pcmpestrm(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x60
|
|||
void pcmpestri(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x61, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
void pcmpistrm(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x62, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
void pcmpistri(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x63, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
void pclmulqdq(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0x44, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
void aeskeygenassist(const Xmm& xmm, const Operand& op, int imm) { opGen(xmm, op, 0xDF, 0x66, isXMM_XMMorMEM, static_cast<uint8>(imm), 0x3A); }
|
||||
void ldmxcsr(const Address& addr) { opModM(addr, Reg32(2), 0x0F, 0xAE); }
|
||||
void stmxcsr(const Address& addr) { opModM(addr, Reg32(3), 0x0F, 0xAE); }
|
||||
void clflush(const Address& addr) { opModM(addr, Reg32(7), 0x0F, 0xAE); }
|
||||
|
@ -530,3 +541,484 @@ void fstp(const Fpu& reg) { opFpu(reg, 0xDD, 0xD8); }
|
|||
void fucom(const Fpu& reg) { opFpu(reg, 0xDD, 0xE0); }
|
||||
void fucomp(const Fpu& reg) { opFpu(reg, 0xDD, 0xE8); }
|
||||
void fxch(const Fpu& reg) { opFpu(reg, 0xD9, 0xC8); }
|
||||
void vaddpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x58, true); }
|
||||
void vaddps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x58, true); }
|
||||
void vaddsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x58, false); }
|
||||
void vaddss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F3, 0x58, false); }
|
||||
void vsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x5C, true); }
|
||||
void vsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x5C, true); }
|
||||
void vsubsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x5C, false); }
|
||||
void vsubss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F3, 0x5C, false); }
|
||||
void vmulpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x59, true); }
|
||||
void vmulps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x59, true); }
|
||||
void vmulsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x59, false); }
|
||||
void vmulss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F3, 0x59, false); }
|
||||
void vdivpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x5E, true); }
|
||||
void vdivps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x5E, true); }
|
||||
void vdivsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x5E, false); }
|
||||
void vdivss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F3, 0x5E, false); }
|
||||
void vmaxpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x5F, true); }
|
||||
void vmaxps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x5F, true); }
|
||||
void vmaxsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x5F, false); }
|
||||
void vmaxss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F3, 0x5F, false); }
|
||||
void vminpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x5D, true); }
|
||||
void vminps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x5D, true); }
|
||||
void vminsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x5D, false); }
|
||||
void vminss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F3, 0x5D, false); }
|
||||
void vandpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x54, true); }
|
||||
void vandps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x54, true); }
|
||||
void vandnpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x55, true); }
|
||||
void vandnps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x55, true); }
|
||||
void vorpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x56, true); }
|
||||
void vorps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x56, true); }
|
||||
void vxorpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x57, true); }
|
||||
void vxorps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F, 0x57, true); }
|
||||
void vblendpd(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x0D, true, 0); db(imm); }
|
||||
void vblendpd(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x0D, true, 0); db(imm); }
|
||||
void vblendps(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x0C, true, 0); db(imm); }
|
||||
void vblendps(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x0C, true, 0); db(imm); }
|
||||
void vdppd(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x41, false, 0); db(imm); }
|
||||
void vdppd(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x41, false, 0); db(imm); }
|
||||
void vdpps(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x40, true, 0); db(imm); }
|
||||
void vdpps(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x40, true, 0); db(imm); }
|
||||
void vmpsadbw(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x42, false, 0); db(imm); }
|
||||
void vmpsadbw(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x42, false, 0); db(imm); }
|
||||
void vpblendw(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x0E, false, 0); db(imm); }
|
||||
void vpblendw(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x0E, false, 0); db(imm); }
|
||||
void vroundsd(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x0B, false, 0); db(imm); }
|
||||
void vroundsd(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x0B, false, 0); db(imm); }
|
||||
void vroundss(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x0A, false, 0); db(imm); }
|
||||
void vroundss(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x0A, false, 0); db(imm); }
|
||||
void vpclmulqdq(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x44, false, 0); db(imm); }
|
||||
void vpclmulqdq(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x44, false, 0); db(imm); }
|
||||
void vpermilps(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x0C, true, 0); }
|
||||
void vpermilpd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x0D, true, 0); }
|
||||
void vcmppd(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xC2, true, -1); db(imm); }
|
||||
void vcmppd(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xC2, true, -1); db(imm); }
|
||||
void vcmpps(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F, 0xC2, true, -1); db(imm); }
|
||||
void vcmpps(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F, 0xC2, true, -1); db(imm); }
|
||||
void vcmpsd(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F2, 0xC2, false, -1); db(imm); }
|
||||
void vcmpsd(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F2, 0xC2, false, -1); db(imm); }
|
||||
void vcmpss(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0xC2, false, -1); db(imm); }
|
||||
void vcmpss(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F3, 0xC2, false, -1); db(imm); }
|
||||
void vcvtsd2ss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F2, 0x5A, false, -1); }
|
||||
void vcvtsd2ss(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F2, 0x5A, false, -1); }
|
||||
void vcvtss2sd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x5A, false, -1); }
|
||||
void vcvtss2sd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F3, 0x5A, false, -1); }
|
||||
void vinsertps(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x21, false, 0); db(imm); }
|
||||
void vinsertps(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x21, false, 0); db(imm); }
|
||||
void vpacksswb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x63, false, -1); }
|
||||
void vpacksswb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x63, false, -1); }
|
||||
void vpackssdw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x6B, false, -1); }
|
||||
void vpackssdw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x6B, false, -1); }
|
||||
void vpackuswb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x67, false, -1); }
|
||||
void vpackuswb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x67, false, -1); }
|
||||
void vpackusdw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x2B, false, -1); }
|
||||
void vpackusdw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x2B, false, -1); }
|
||||
void vpaddb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xFC, false, -1); }
|
||||
void vpaddb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xFC, false, -1); }
|
||||
void vpaddw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xFD, false, -1); }
|
||||
void vpaddw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xFD, false, -1); }
|
||||
void vpaddd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xFE, false, -1); }
|
||||
void vpaddd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xFE, false, -1); }
|
||||
void vpaddq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD4, false, -1); }
|
||||
void vpaddq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD4, false, -1); }
|
||||
void vpaddsb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEC, false, -1); }
|
||||
void vpaddsb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEC, false, -1); }
|
||||
void vpaddsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xED, false, -1); }
|
||||
void vpaddsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xED, false, -1); }
|
||||
void vpaddusb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xDC, false, -1); }
|
||||
void vpaddusb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xDC, false, -1); }
|
||||
void vpaddusw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xDD, false, -1); }
|
||||
void vpaddusw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xDD, false, -1); }
|
||||
void vpalignr(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F3A | PP_66, 0x0F, false, -1); db(imm); }
|
||||
void vpalignr(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F3A | PP_66, 0x0F, false, -1); db(imm); }
|
||||
void vpand(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xDB, false, -1); }
|
||||
void vpand(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xDB, false, -1); }
|
||||
void vpandn(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xDF, false, -1); }
|
||||
void vpandn(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xDF, false, -1); }
|
||||
void vpavgb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE0, false, -1); }
|
||||
void vpavgb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE0, false, -1); }
|
||||
void vpavgw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE3, false, -1); }
|
||||
void vpavgw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE3, false, -1); }
|
||||
void vpcmpeqb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x74, false, -1); }
|
||||
void vpcmpeqb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x74, false, -1); }
|
||||
void vpcmpeqw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x75, false, -1); }
|
||||
void vpcmpeqw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x75, false, -1); }
|
||||
void vpcmpeqd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x76, false, -1); }
|
||||
void vpcmpeqd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x76, false, -1); }
|
||||
void vpcmpeqq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x29, false, -1); }
|
||||
void vpcmpeqq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x29, false, -1); }
|
||||
void vpcmpgtb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x64, false, -1); }
|
||||
void vpcmpgtb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x64, false, -1); }
|
||||
void vpcmpgtw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x65, false, -1); }
|
||||
void vpcmpgtw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x65, false, -1); }
|
||||
void vpcmpgtd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x66, false, -1); }
|
||||
void vpcmpgtd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x66, false, -1); }
|
||||
void vpcmpgtq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x37, false, -1); }
|
||||
void vpcmpgtq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x37, false, -1); }
|
||||
void vphaddw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x01, false, -1); }
|
||||
void vphaddw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x01, false, -1); }
|
||||
void vphaddd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x02, false, -1); }
|
||||
void vphaddd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x02, false, -1); }
|
||||
void vphaddsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x03, false, -1); }
|
||||
void vphaddsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x03, false, -1); }
|
||||
void vphsubw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x05, false, -1); }
|
||||
void vphsubw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x05, false, -1); }
|
||||
void vphsubd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x06, false, -1); }
|
||||
void vphsubd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x06, false, -1); }
|
||||
void vphsubsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x07, false, -1); }
|
||||
void vphsubsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x07, false, -1); }
|
||||
void vpmaddwd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF5, false, -1); }
|
||||
void vpmaddwd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF5, false, -1); }
|
||||
void vpmaddubsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x04, false, -1); }
|
||||
void vpmaddubsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x04, false, -1); }
|
||||
void vpmaxsb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3C, false, -1); }
|
||||
void vpmaxsb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3C, false, -1); }
|
||||
void vpmaxsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEE, false, -1); }
|
||||
void vpmaxsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEE, false, -1); }
|
||||
void vpmaxsd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3D, false, -1); }
|
||||
void vpmaxsd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3D, false, -1); }
|
||||
void vpmaxub(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xDE, false, -1); }
|
||||
void vpmaxub(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xDE, false, -1); }
|
||||
void vpmaxuw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3E, false, -1); }
|
||||
void vpmaxuw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3E, false, -1); }
|
||||
void vpmaxud(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3F, false, -1); }
|
||||
void vpmaxud(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3F, false, -1); }
|
||||
void vpminsb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x38, false, -1); }
|
||||
void vpminsb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x38, false, -1); }
|
||||
void vpminsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEA, false, -1); }
|
||||
void vpminsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEA, false, -1); }
|
||||
void vpminsd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x39, false, -1); }
|
||||
void vpminsd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x39, false, -1); }
|
||||
void vpminub(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xDA, false, -1); }
|
||||
void vpminub(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xDA, false, -1); }
|
||||
void vpminuw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3A, false, -1); }
|
||||
void vpminuw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3A, false, -1); }
|
||||
void vpminud(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x3B, false, -1); }
|
||||
void vpminud(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x3B, false, -1); }
|
||||
void vpmulhuw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE4, false, -1); }
|
||||
void vpmulhuw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE4, false, -1); }
|
||||
void vpmulhrsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x0B, false, -1); }
|
||||
void vpmulhrsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x0B, false, -1); }
|
||||
void vpmulhw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE5, false, -1); }
|
||||
void vpmulhw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE5, false, -1); }
|
||||
void vpmullw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD5, false, -1); }
|
||||
void vpmullw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD5, false, -1); }
|
||||
void vpmulld(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x40, false, -1); }
|
||||
void vpmulld(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x40, false, -1); }
|
||||
void vpmuludq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF4, false, -1); }
|
||||
void vpmuludq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF4, false, -1); }
|
||||
void vpmuldq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x28, false, -1); }
|
||||
void vpmuldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x28, false, -1); }
|
||||
void vpor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEB, false, -1); }
|
||||
void vpor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEB, false, -1); }
|
||||
void vpsadbw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF6, false, -1); }
|
||||
void vpsadbw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF6, false, -1); }
|
||||
void vpshufb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x00, false, -1); }
|
||||
void vpsignb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x08, false, -1); }
|
||||
void vpsignb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x08, false, -1); }
|
||||
void vpsignw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x09, false, -1); }
|
||||
void vpsignw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x09, false, -1); }
|
||||
void vpsignd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F38 | PP_66, 0x0A, false, -1); }
|
||||
void vpsignd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F38 | PP_66, 0x0A, false, -1); }
|
||||
void vpsllw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF1, false, -1); }
|
||||
void vpsllw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF1, false, -1); }
|
||||
void vpslld(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF2, false, -1); }
|
||||
void vpslld(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF2, false, -1); }
|
||||
void vpsllq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF3, false, -1); }
|
||||
void vpsllq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF3, false, -1); }
|
||||
void vpsraw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE1, false, -1); }
|
||||
void vpsraw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE1, false, -1); }
|
||||
void vpsrad(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE2, false, -1); }
|
||||
void vpsrad(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE2, false, -1); }
|
||||
void vpsrlw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD1, false, -1); }
|
||||
void vpsrlw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD1, false, -1); }
|
||||
void vpsrld(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD2, false, -1); }
|
||||
void vpsrld(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD2, false, -1); }
|
||||
void vpsrlq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD3, false, -1); }
|
||||
void vpsrlq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD3, false, -1); }
|
||||
void vpsubb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF8, false, -1); }
|
||||
void vpsubb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF8, false, -1); }
|
||||
void vpsubw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xF9, false, -1); }
|
||||
void vpsubw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xF9, false, -1); }
|
||||
void vpsubd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xFA, false, -1); }
|
||||
void vpsubd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xFA, false, -1); }
|
||||
void vpsubq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xFB, false, -1); }
|
||||
void vpsubq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xFB, false, -1); }
|
||||
void vpsubsb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE8, false, -1); }
|
||||
void vpsubsb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE8, false, -1); }
|
||||
void vpsubsw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xE9, false, -1); }
|
||||
void vpsubsw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xE9, false, -1); }
|
||||
void vpsubusb(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD8, false, -1); }
|
||||
void vpsubusb(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD8, false, -1); }
|
||||
void vpsubusw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xD9, false, -1); }
|
||||
void vpsubusw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xD9, false, -1); }
|
||||
void vpunpckhbw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x68, false, -1); }
|
||||
void vpunpckhbw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x68, false, -1); }
|
||||
void vpunpckhwd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x69, false, -1); }
|
||||
void vpunpckhwd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x69, false, -1); }
|
||||
void vpunpckhdq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x6A, false, -1); }
|
||||
void vpunpckhdq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x6A, false, -1); }
|
||||
void vpunpckhqdq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x6D, false, -1); }
|
||||
void vpunpckhqdq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x6D, false, -1); }
|
||||
void vpunpcklbw(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x60, false, -1); }
|
||||
void vpunpcklbw(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x60, false, -1); }
|
||||
void vpunpcklwd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x61, false, -1); }
|
||||
void vpunpcklwd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x61, false, -1); }
|
||||
void vpunpckldq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x62, false, -1); }
|
||||
void vpunpckldq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x62, false, -1); }
|
||||
void vpunpcklqdq(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x6C, false, -1); }
|
||||
void vpunpcklqdq(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x6C, false, -1); }
|
||||
void vpxor(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xEF, false, -1); }
|
||||
void vpxor(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xEF, false, -1); }
|
||||
void vrcpss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x53, false, -1); }
|
||||
void vrcpss(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F3, 0x53, false, -1); }
|
||||
void vrsqrtss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x52, false, -1); }
|
||||
void vrsqrtss(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F3, 0x52, false, -1); }
|
||||
void vshufpd(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0xC6, true, -1); db(imm); }
|
||||
void vshufpd(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0xC6, true, -1); db(imm); }
|
||||
void vshufps(const Xmm& xm1, const Xmm& xm2, const Operand& op, uint8 imm) { opAVX_X_X_XM(xm1, xm2, op, MM_0F, 0xC6, true, -1); db(imm); }
|
||||
void vshufps(const Xmm& xmm, const Operand& op, uint8 imm) { opAVX_X_X_XM(xmm, xmm, op, MM_0F, 0xC6, true, -1); db(imm); }
|
||||
void vsqrtsd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F2, 0x51, false, -1); }
|
||||
void vsqrtsd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F2, 0x51, false, -1); }
|
||||
void vsqrtss(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_F3, 0x51, false, -1); }
|
||||
void vsqrtss(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_F3, 0x51, false, -1); }
|
||||
void vunpckhpd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x15, true, -1); }
|
||||
void vunpckhpd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x15, true, -1); }
|
||||
void vunpckhps(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F, 0x15, true, -1); }
|
||||
void vunpckhps(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F, 0x15, true, -1); }
|
||||
void vunpcklpd(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F | PP_66, 0x14, true, -1); }
|
||||
void vunpcklpd(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F | PP_66, 0x14, true, -1); }
|
||||
void vunpcklps(const Xmm& xm1, const Xmm& xm2, const Operand& op) { opAVX_X_X_XM(xm1, xm2, op, MM_0F, 0x14, true, -1); }
|
||||
void vunpcklps(const Xmm& xmm, const Operand& op) { opAVX_X_X_XM(xmm, xmm, op, MM_0F, 0x14, true, -1); }
|
||||
void vaeskeygenassist(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0xDF, false, 0, imm); }
|
||||
void vroundpd(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x09, true, 0, imm); }
|
||||
void vroundps(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x08, true, 0, imm); }
|
||||
void vpermilpd(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x05, true, 0, imm); }
|
||||
void vpermilps(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x04, true, 0, imm); }
|
||||
void vpcmpestri(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x61, false, 0, imm); }
|
||||
void vpcmpestrm(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x60, false, 0, imm); }
|
||||
void vpcmpistri(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x63, false, 0, imm); }
|
||||
void vpcmpistrm(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F3A | PP_66, 0x62, false, 0, imm); }
|
||||
void vtestps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x0E, true, 0); }
|
||||
void vtestpd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x0F, true, 0); }
|
||||
void vcomisd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x2F, false, -1); }
|
||||
void vcomiss(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x2F, false, -1); }
|
||||
void vcvtdq2ps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x5B, true, -1); }
|
||||
void vcvtps2dq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x5B, true, -1); }
|
||||
void vcvttps2dq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_F3, 0x5B, true, -1); }
|
||||
void vmovapd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x28, true, -1); }
|
||||
void vmovaps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x28, true, -1); }
|
||||
void vmovddup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_F2, 0x12, true, -1); }
|
||||
void vmovdqa(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x6F, true, -1); }
|
||||
void vmovdqu(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_F3, 0x6F, true, -1); }
|
||||
void vmovshdup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_F3, 0x16, true, -1); }
|
||||
void vmovsldup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_F3, 0x12, true, -1); }
|
||||
void vmovupd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x10, true, -1); }
|
||||
void vmovups(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x10, true, -1); }
|
||||
void vpabsb(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x1C, false, -1); }
|
||||
void vpabsw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x1D, false, -1); }
|
||||
void vpabsd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x1E, false, -1); }
|
||||
void vphminposuw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x41, false, -1); }
|
||||
void vpmovsxbw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x20, false, -1); }
|
||||
void vpmovsxbd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x21, false, -1); }
|
||||
void vpmovsxbq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x22, false, -1); }
|
||||
void vpmovsxwd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x23, false, -1); }
|
||||
void vpmovsxwq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x24, false, -1); }
|
||||
void vpmovsxdq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x25, false, -1); }
|
||||
void vpmovzxbw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x30, false, -1); }
|
||||
void vpmovzxbd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x31, false, -1); }
|
||||
void vpmovzxbq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x32, false, -1); }
|
||||
void vpmovzxwd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x33, false, -1); }
|
||||
void vpmovzxwq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x34, false, -1); }
|
||||
void vpmovzxdq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x35, false, -1); }
|
||||
void vpshufd(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x70, false, -1, imm); }
|
||||
void vpshufhw(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_F3, 0x70, false, -1, imm); }
|
||||
void vpshuflw(const Xmm& xm, const Operand& op, uint8 imm) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_F2, 0x70, false, -1, imm); }
|
||||
void vptest(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F38 | PP_66, 0x17, false, -1); }
|
||||
void vrcpps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x53, true, -1); }
|
||||
void vrsqrtps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x52, true, -1); }
|
||||
void vsqrtpd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x51, true, -1); }
|
||||
void vsqrtps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x51, true, -1); }
|
||||
void vucomisd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F | PP_66, 0x2E, false, -1); }
|
||||
void vucomiss(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, MM_0F, 0x2E, false, -1); }
|
||||
void vmovapd(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, MM_0F | PP_66, 0x29, true, -1); }
|
||||
void vmovaps(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, MM_0F, 0x29, true, -1); }
|
||||
void vmovdqa(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, MM_0F | PP_66, 0x7F, true, -1); }
|
||||
void vmovdqu(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, MM_0F | PP_F3, 0x7F, true, -1); }
|
||||
void vmovupd(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, MM_0F | PP_66, 0x11, true, -1); }
|
||||
void vmovups(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, MM_0F, 0x11, true, -1); }
|
||||
void vaddsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0xD0, true, -1); }
|
||||
void vaddsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0xD0, true, -1); }
|
||||
void vhaddpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x7C, true, -1); }
|
||||
void vhaddps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x7C, true, -1); }
|
||||
void vhsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_66, 0x7D, true, -1); }
|
||||
void vhsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F | PP_F2, 0x7D, true, -1); }
|
||||
void vaesenc(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xDC, false, 0); }
|
||||
void vaesenclast(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xDD, false, 0); }
|
||||
void vaesdec(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xDE, false, 0); }
|
||||
void vaesdeclast(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xDF, false, 0); }
|
||||
void vmaskmovps(const Xmm& xm1, const Xmm& xm2, const Address& addr) { opAVX_X_X_XM(xm1, xm2, addr, MM_0F38 | PP_66, 0x2C, true, 0); }
|
||||
void vmaskmovps(const Address& addr, const Xmm& xm1, const Xmm& xm2) { opAVX_X_X_XM(xm2, xm1, addr, MM_0F38 | PP_66, 0x2E, true, 0); }
|
||||
void vmaskmovpd(const Xmm& xm1, const Xmm& xm2, const Address& addr) { opAVX_X_X_XM(xm1, xm2, addr, MM_0F38 | PP_66, 0x2D, true, 0); }
|
||||
void vmaskmovpd(const Address& addr, const Xmm& xm1, const Xmm& xm2) { opAVX_X_X_XM(xm2, xm1, addr, MM_0F38 | PP_66, 0x2F, true, 0); }
|
||||
void vmovhpd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, op2, MM_0F | PP_66, 0x16, false); }
|
||||
void vmovhpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0x17, false); }
|
||||
void vmovhps(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, op2, MM_0F, 0x16, false); }
|
||||
void vmovhps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F, 0x17, false); }
|
||||
void vmovlpd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, op2, MM_0F | PP_66, 0x12, false); }
|
||||
void vmovlpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0x13, false); }
|
||||
void vmovlps(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, op2, MM_0F, 0x12, false); }
|
||||
void vmovlps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F, 0x13, false); }
|
||||
void vfmadd132pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x98, true, 1); }
|
||||
void vfmadd213pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA8, true, 1); }
|
||||
void vfmadd231pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB8, true, 1); }
|
||||
void vfmadd132ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x98, true, 0); }
|
||||
void vfmadd213ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA8, true, 0); }
|
||||
void vfmadd231ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB8, true, 0); }
|
||||
void vfmadd132sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x99, false, 1); }
|
||||
void vfmadd213sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA9, false, 1); }
|
||||
void vfmadd231sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB9, false, 1); }
|
||||
void vfmadd132ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x99, false, 0); }
|
||||
void vfmadd213ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA9, false, 0); }
|
||||
void vfmadd231ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB9, false, 0); }
|
||||
void vfmaddsub132pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x96, true, 1); }
|
||||
void vfmaddsub213pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA6, true, 1); }
|
||||
void vfmaddsub231pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB6, true, 1); }
|
||||
void vfmaddsub132ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x96, true, 0); }
|
||||
void vfmaddsub213ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA6, true, 0); }
|
||||
void vfmaddsub231ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB6, true, 0); }
|
||||
void vfmsubadd132pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x97, true, 1); }
|
||||
void vfmsubadd213pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA7, true, 1); }
|
||||
void vfmsubadd231pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB7, true, 1); }
|
||||
void vfmsubadd132ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x97, true, 0); }
|
||||
void vfmsubadd213ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xA7, true, 0); }
|
||||
void vfmsubadd231ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xB7, true, 0); }
|
||||
void vfmsub132pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9A, true, 1); }
|
||||
void vfmsub213pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAA, true, 1); }
|
||||
void vfmsub231pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBA, true, 1); }
|
||||
void vfmsub132ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9A, true, 0); }
|
||||
void vfmsub213ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAA, true, 0); }
|
||||
void vfmsub231ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBA, true, 0); }
|
||||
void vfmsub132sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9B, false, 1); }
|
||||
void vfmsub213sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAB, false, 1); }
|
||||
void vfmsub231sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBB, false, 1); }
|
||||
void vfmsub132ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9B, false, 0); }
|
||||
void vfmsub213ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAB, false, 0); }
|
||||
void vfmsub231ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBB, false, 0); }
|
||||
void vfnmadd132pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9C, true, 1); }
|
||||
void vfnmadd213pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAC, true, 1); }
|
||||
void vfnmadd231pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBC, true, 1); }
|
||||
void vfnmadd132ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9C, true, 0); }
|
||||
void vfnmadd213ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAC, true, 0); }
|
||||
void vfnmadd231ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBC, true, 0); }
|
||||
void vfnmadd132sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9D, false, 1); }
|
||||
void vfnmadd213sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAD, false, 1); }
|
||||
void vfnmadd231sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBD, false, 1); }
|
||||
void vfnmadd132ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9D, false, 0); }
|
||||
void vfnmadd213ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAD, false, 0); }
|
||||
void vfnmadd231ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBD, false, 0); }
|
||||
void vfnmsub132pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9E, true, 1); }
|
||||
void vfnmsub213pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAE, true, 1); }
|
||||
void vfnmsub231pd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBE, true, 1); }
|
||||
void vfnmsub132ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9E, true, 0); }
|
||||
void vfnmsub213ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAE, true, 0); }
|
||||
void vfnmsub231ps(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBE, true, 0); }
|
||||
void vfnmsub132sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9F, false, 1); }
|
||||
void vfnmsub213sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAF, false, 1); }
|
||||
void vfnmsub231sd(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBF, false, 1); }
|
||||
void vfnmsub132ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0x9F, false, 0); }
|
||||
void vfnmsub213ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xAF, false, 0); }
|
||||
void vfnmsub231ss(const Xmm& xmm, const Xmm& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, MM_0F38 | PP_66, 0xBF, false, 0); }
|
||||
void vaesimc(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, MM_0F38 | PP_66, 0xDB, false, 0); }
|
||||
void vbroadcastf128(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, MM_0F38 | PP_66, 0x1A, true, 0); }
|
||||
void vbroadcastsd(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, MM_0F38 | PP_66, 0x19, true, 0); }
|
||||
void vbroadcastss(const Xmm& x, const Address& addr) { opAVX_X_XM_IMM(x, addr, MM_0F38 | PP_66, 0x18, true, 0); }
|
||||
void vextractf128(const Operand& op, const Ymm& y, uint8 imm) { opAVX_X_XM_IMM(y, cvtReg(op, op.isXMM(), Operand::YMM), MM_0F3A | PP_66, 0x19, true, 0, imm); }
|
||||
void vinsertf128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8 imm) { opAVX_X_X_XM(y1, y2, cvtReg(op, op.isXMM(), Operand::YMM), MM_0F3A | PP_66, 0x18, true, 0); db(imm); }
|
||||
void vperm2f128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8 imm) { opAVX_X_X_XM(y1, y2, op, MM_0F3A | PP_66, 0x06, true, 0); db(imm); }
|
||||
void vlddqu(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F | PP_F2, 0xF0, true, 0); }
|
||||
void vldmxcsr(const Address& addr) { opAVX_X_X_XM(xm2, xm0, addr, MM_0F, 0xAE, false, -1); }
|
||||
void vstmxcsr(const Address& addr) { opAVX_X_X_XM(xm3, xm0, addr, MM_0F, 0xAE, false, -1); }
|
||||
void vmaskmovdqu(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, MM_0F | PP_66, 0xF7, false, -1); }
|
||||
void vpextrb(const Operand& op, const Xmm& x, uint8 imm) { if (!op.isREG(i32e) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, xm0, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x14, false); db(imm); }
|
||||
void vpextrw(const Reg& r, const Xmm& x, uint8 imm) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), MM_0F | PP_66, 0xC5, false); db(imm); }
|
||||
void vpextrw(const Address& addr, const Xmm& x, uint8 imm) { opAVX_X_X_XM(x, xm0, addr, MM_0F3A | PP_66, 0x15, false); db(imm); }
|
||||
void vpextrd(const Operand& op, const Xmm& x, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, xm0, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x16, false, 0); db(imm); }
|
||||
void vpinsrb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x20, false); db(imm); }
|
||||
void vpinsrb(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x20, false); db(imm); }
|
||||
void vpinsrw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F | PP_66, 0xC4, false); db(imm); }
|
||||
void vpinsrw(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F | PP_66, 0xC4, false); db(imm); }
|
||||
void vpinsrd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 0); db(imm); }
|
||||
void vpinsrd(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(32) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 0); db(imm); }
|
||||
void vpmovmskb(const Reg32e& r, const Xmm& x) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, x, MM_0F | PP_66, 0xD7, false); }
|
||||
void vpslldq(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm7, x1, x2, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vpslldq(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm7, x, x, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vpsrldq(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm3, x1, x2, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vpsrldq(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm3, x, x, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vpsllw(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm6, x1, x2, MM_0F | PP_66, 0x71, false); db(imm); }
|
||||
void vpsllw(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm6, x, x, MM_0F | PP_66, 0x71, false); db(imm); }
|
||||
void vpslld(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm6, x1, x2, MM_0F | PP_66, 0x72, false); db(imm); }
|
||||
void vpslld(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm6, x, x, MM_0F | PP_66, 0x72, false); db(imm); }
|
||||
void vpsllq(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm6, x1, x2, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vpsllq(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm6, x, x, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vpsraw(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm4, x1, x2, MM_0F | PP_66, 0x71, false); db(imm); }
|
||||
void vpsraw(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm4, x, x, MM_0F | PP_66, 0x71, false); db(imm); }
|
||||
void vpsrad(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm4, x1, x2, MM_0F | PP_66, 0x72, false); db(imm); }
|
||||
void vpsrad(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm4, x, x, MM_0F | PP_66, 0x72, false); db(imm); }
|
||||
void vpsrlw(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm2, x1, x2, MM_0F | PP_66, 0x71, false); db(imm); }
|
||||
void vpsrlw(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm2, x, x, MM_0F | PP_66, 0x71, false); db(imm); }
|
||||
void vpsrld(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm2, x1, x2, MM_0F | PP_66, 0x72, false); db(imm); }
|
||||
void vpsrld(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm2, x, x, MM_0F | PP_66, 0x72, false); db(imm); }
|
||||
void vpsrlq(const Xmm& x1, const Xmm& x2, uint8 imm) { opAVX_X_X_XM(xm2, x1, x2, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vpsrlq(const Xmm& x, uint8 imm) { opAVX_X_X_XM(xm2, x, x, MM_0F | PP_66, 0x73, false); db(imm); }
|
||||
void vblendvpd(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, MM_0F3A | PP_66, 0x4B, true); db(x4.getIdx() << 4); }
|
||||
void vblendvpd(const Xmm& x1, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x1, op, MM_0F3A | PP_66, 0x4B, true); db(x4.getIdx() << 4); }
|
||||
void vblendvps(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, MM_0F3A | PP_66, 0x4A, true); db(x4.getIdx() << 4); }
|
||||
void vblendvps(const Xmm& x1, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x1, op, MM_0F3A | PP_66, 0x4A, true); db(x4.getIdx() << 4); }
|
||||
void vpblendvb(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, MM_0F3A | PP_66, 0x4C, false); db(x4.getIdx() << 4); }
|
||||
void vpblendvb(const Xmm& x1, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x1, op, MM_0F3A | PP_66, 0x4C, false); db(x4.getIdx() << 4); }
|
||||
void vmovd(const Xmm& x, const Reg32& reg) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x6E, false, 0); }
|
||||
void vmovd(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0x6E, false, 0); }
|
||||
void vmovd(const Reg32& reg, const Xmm& x) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x7E, false, 0); }
|
||||
void vmovd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0x7E, false, 0); }
|
||||
void vmovhlps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, op, MM_0F, 0x12, false); }
|
||||
void vmovlhps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, op, MM_0F, 0x16, false); }
|
||||
void vmovmskpd(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), x.isXMM() ? xm0 : ym0, x, MM_0F | PP_66, 0x50, true, 0); }
|
||||
void vmovmskps(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), x.isXMM() ? xm0 : ym0, x, MM_0F, 0x50, true, 0); }
|
||||
void vmovntdq(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F | PP_66, 0xE7, true); }
|
||||
void vmovntpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F | PP_66, 0x2B, true); }
|
||||
void vmovntps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, addr, MM_0F, 0x2B, true); }
|
||||
void vmovntdqa(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F38 | PP_66, 0x2A, false); }
|
||||
void vmovsd(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, op, MM_0F | PP_F2, 0x10, false); }
|
||||
void vmovsd(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F2, 0x10, false); }
|
||||
void vmovsd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F2, 0x11, false); }
|
||||
void vmovss(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, op, MM_0F | PP_F3, 0x10, false); }
|
||||
void vmovss(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F3, 0x10, false); }
|
||||
void vmovss(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F3, 0x11, false); }
|
||||
void vcvtss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2D, false, 0); }
|
||||
void vcvttss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2C, false, 0); }
|
||||
void vcvtsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2D, false, 0); }
|
||||
void vcvttsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2C, false, 0); }
|
||||
void vcvtsi2ss(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !(op2.isREG(i32e) || op2.isMEM())) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, cvtReg(op2, op2.isREG(), Operand::XMM), MM_0F | PP_F3, 0x2A, false, (op1.isMEM() || op2.isMEM()) ? -1 : (op1.isREG(32) || op2.isREG(32)) ? 0 : 1); }
|
||||
void vcvtsi2sd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !(op2.isREG(i32e) || op2.isMEM())) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, op1, cvtReg(op2, op2.isREG(), Operand::XMM), MM_0F | PP_F2, 0x2A, false, (op1.isMEM() || op2.isMEM()) ? -1 : (op1.isREG(32) || op2.isREG(32)) ? 0 : 1); }
|
||||
void vcvtps2pd(const Xmm& x, const Operand& op) { if (!op.isMEM() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, cvtReg(op, !op.isMEM(), x.isXMM() ? Operand::XMM : Operand::YMM), MM_0F, 0x5A, true); }
|
||||
void vcvtdq2pd(const Xmm& x, const Operand& op) { if (!op.isMEM() && !op.isXMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x.isXMM() ? xm0 : ym0, cvtReg(op, !op.isMEM(), x.isXMM() ? Operand::XMM : Operand::YMM), MM_0F | PP_F3, 0xE6, true); }
|
||||
void vcvtpd2ps(const Xmm& x, const Operand& op) { if (x.isYMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(op.isYMM() ? Ymm(x.getIdx()) : x, op.isYMM() ? ym0 : xm0, op, MM_0F | PP_66, 0x5A, true); }
|
||||
void vcvtpd2dq(const Xmm& x, const Operand& op) { if (x.isYMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(op.isYMM() ? Ymm(x.getIdx()) : x, op.isYMM() ? ym0 : xm0, op, MM_0F | PP_F2, 0xE6, true); }
|
||||
void vcvttpd2dq(const Xmm& x, const Operand& op) { if (x.isYMM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(op.isYMM() ? Ymm(x.getIdx()) : x, op.isYMM() ? ym0 : xm0, op, MM_0F | PP_66, 0xE6, true); }
|
||||
#ifdef XBYAK64
|
||||
void vmovq(const Xmm& x, const Reg64& reg) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x6E, false, 1); }
|
||||
void vmovq(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_F3, 0x7E, false, -1); }
|
||||
void vmovq(const Reg64& reg, const Xmm& x) { opAVX_X_X_XM(x, xm0, Xmm(reg.getIdx()), MM_0F | PP_66, 0x7E, false, 1); }
|
||||
void vmovq(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, MM_0F | PP_66, 0xD6, false, -1); }
|
||||
void vmovq(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, MM_0F | PP_F3, 0x7E, false, -1); }
|
||||
void vpextrq(const Operand& op, const Xmm& x, uint8 imm) { if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, xm0, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x16, false, 1); db(imm); }
|
||||
void vpinsrq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x1, x2, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 1); db(imm); }
|
||||
void vpinsrq(const Xmm& x, const Operand& op, uint8 imm) { if (!op.isREG(64) && !op.isMEM()) throw ERR_BAD_COMBINATION; opAVX_X_X_XM(x, x, cvtReg(op, !op.isMEM(), Operand::XMM), MM_0F3A | PP_66, 0x22, false, 1); db(imm); }
|
||||
void vcvtss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2D, false, 1); }
|
||||
void vcvttss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F3, 0x2C, false, 1); }
|
||||
void vcvtsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2D, false, 1); }
|
||||
void vcvttsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, MM_0F | PP_F2, 0x2C, false, 1); }
|
||||
#endif
|
||||
|
|
|
@ -76,11 +76,17 @@ public:
|
|||
tSSE41 = 1 << 7,
|
||||
tSSE42 = 1 << 8,
|
||||
tPOPCNT = 1 << 9,
|
||||
tAESNI = 1 << 10,
|
||||
tSSE5 = 1 << 11,
|
||||
tOSXSACE = 1 << 12,
|
||||
tPCLMULQDQ = 1 << 13,
|
||||
tAVX = 1 << 14,
|
||||
tFMA = 1 << 15,
|
||||
|
||||
t3DN = 1 << 16,
|
||||
tE3DN = 1 << 17,
|
||||
tSSE4a = 1 << 18,
|
||||
tSSE5 = 1 << 11,
|
||||
tRDTSCP = 1 << 19,
|
||||
|
||||
tINTEL = 1 << 24,
|
||||
tAMD = 1 << 25
|
||||
|
@ -99,9 +105,12 @@ public:
|
|||
if (data[3] & (1U << 15)) type_ |= tCMOV;
|
||||
if (data[3] & (1U << 30)) type_ |= tE3DN;
|
||||
if (data[3] & (1U << 22)) type_ |= tMMX2;
|
||||
if (data[3] & (1U << 27)) type_ |= tRDTSCP;
|
||||
}
|
||||
if (data[2] == get32bitAsBE(intel)) {
|
||||
type_ |= tINTEL;
|
||||
getCpuid(0x80000001, data);
|
||||
if (data[3] & (1U << 27)) type_ |= tRDTSCP;
|
||||
}
|
||||
getCpuid(1, data);
|
||||
if (data[2] & (1U << 0)) type_ |= tSSE3;
|
||||
|
@ -109,6 +118,13 @@ public:
|
|||
if (data[2] & (1U << 19)) type_ |= tSSE41;
|
||||
if (data[2] & (1U << 20)) type_ |= tSSE42;
|
||||
if (data[2] & (1U << 23)) type_ |= tPOPCNT;
|
||||
if (data[2] & (1U << 25)) type_ |= tAESNI;
|
||||
if (data[2] & (1U << 1)) type_ |= tPCLMULQDQ;
|
||||
if (data[2] & (1U << 27)) type_ |= tOSXSACE;
|
||||
// QQQ
|
||||
// should check XFEATURE_ENABLED_MASK[2:1] = '11b' by xgetvb
|
||||
if (data[2] & (1U << 28)) type_ |= tAVX;
|
||||
if (data[2] & (1U << 12)) type_ |= tFMA;
|
||||
|
||||
if (data[3] & (1U << 15)) type_ |= tCMOV;
|
||||
if (data[3] & (1U << 23)) type_ |= tMMX;
|
||||
|
|
Loading…
Reference in a new issue