This commit is contained in:
MITSUNARI Shigeo 2022-04-22 15:31:49 +09:00
parent ab4e52d674
commit f7bfc26345
7 changed files with 13 additions and 7 deletions

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@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 2.6...3.0.2)
project(xbyak LANGUAGES CXX VERSION 6.04)
project(xbyak LANGUAGES CXX VERSION 6.041)
file(GLOB headers xbyak/*.h)

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@ -1,7 +1,7 @@
TARGET=../xbyak/xbyak_mnemonic.h
BIN=sortline gen_code gen_avx512
CFLAGS=-I../ -O2 -DXBYAK_NO_OP_NAMES -Wall -Wextra -Wno-missing-field-initializers $(CXXFLAGS) $(CPPFLAGS) $(LDFLAGS)
all: $(TARGET) ../CMakeLists.txt ../meson.build
all: $(TARGET) ../CMakeLists.txt ../meson.build ../readme.md ../readme.txt
sortline: sortline.cpp
$(CXX) $(CFLAGS) $< -o $@
gen_code: gen_code.cpp ../xbyak/xbyak.h avx_type.hpp
@ -29,5 +29,11 @@ VER=$(shell head -n 1 ../xbyak/xbyak_mnemonic.h|grep -o "[0-9.]*")
../meson.build: $(TARGET)
sed -i -e "s/version: '[0-9.]*',/version: '$(VER)',/" $@
../readme.md: $(TARGET)
sed -l 2 -i -e "s/Xbyak [0-9.]*/Xbyak $(VER)/" $@
../readme.txt: $(TARGET)
sed -l 2 -i -e "s/Xbyak [0-9.]*/Xbyak $(VER)/" $@
clean:
$(RM) $(BIN) $(TARGET)

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@ -5,7 +5,7 @@
project(
'xbyak',
'cpp',
version: '6.04',
version: '6.041',
license: 'BSD-3-Clause',
default_options: 'b_ndebug=if-release'
)

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@ -1,5 +1,5 @@
# Xbyak 6.04 [![Badge Build]][Build Status]
# Xbyak 6.041 [![Badge Build]][Build Status]
*A C++ JIT assembler for x86 (IA32), x64 (AMD64, x86-64)*

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@ -1,5 +1,5 @@
C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 6.04
C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 6.041
-----------------------------------------------------------------------------
◎概要

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@ -144,7 +144,7 @@ namespace Xbyak {
enum {
DEFAULT_MAX_CODE_SIZE = 4096,
VERSION = 0x6040 /* 0xABCD = A.BC(D) */
VERSION = 0x6041 /* 0xABCD = A.BC(D) */
};
#ifndef MIE_INTEGER_TYPE_DEFINED

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@ -1,4 +1,4 @@
const char *getVersionString() const { return "6.04"; }
const char *getVersionString() const { return "6.041"; }
void adc(const Operand& op, uint32_t imm) { opRM_I(op, imm, 0x10, 2); }
void adc(const Operand& op1, const Operand& op2) { opRM_RM(op1, op2, 0x10); }
void adcx(const Reg32e& reg, const Operand& op) { opGen(reg, op, 0xF6, 0x66, isREG32_REG32orMEM, NONE, 0x38); }